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ORCIDNasser Erfani Majd
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2020 – today
- 2024
[j6]Rezvan Fani
, Reza Montazerolghaem, Ehsan Adib, Nasser Erfani Majd:
Parallel Input Series Output Ultra-High Step up DC/DC Converter With Three Degrees of Freedom. IEEE Trans. Ind. Electron. 71(8): 8581-8589 (2024)- 2022
- [j5]Nasser Erfani Majd, Rezvan Fani:
Complexity-Reduced Parallel Time-Interleaved Delta-Sigma Modulator for Transmitter Applications. J. Circuits Syst. Comput. 31(14): 2250241:1-2250241:16 (2022) - 2020
- [j4]Nasser Erfani Majd, Amin Aeenmehr:
Efficiency Improvement of Delta Sigma Modulator-Based Transmitter Using Complex Delta Sigma Modulator and Noise Reduction Loop. J. Circuits Syst. Comput. 29(16): 2050267:1-2050267:13 (2020)
2010 – 2019
- 2017
- [j3]Nasser Erfani Majd, Hassan Ghafoori Fard, Abbas Mohammadi:
Coding Efficiency and Bandwidth Enhancement in Polar Delta-Sigma Modulator Transmitter Using Quantization Noise Reduction and Parallel Processing Techniques. J. Circuits Syst. Comput. 26(5): 1750085:1-1750085:23 (2017) - 2011
- [j2]Nasser Erfani Majd, Mojtaba Lotfizad, M. B. Ghaznavi-Ghoushchi, Arash Abadian:
An ultra low-power digitally controlled oscillator using novel Schmitt-trigger based hysteresis delay cells. IEICE Electron. Express 8(8): 589-595 (2011) - [j1]Arash Abadian, Mojtaba Lotfizad, M. B. Ghaznavi-Ghoushchi, Nasser Erfani Majd:
An ultra low power and low complexity all digital PLL with a high resolution digitally controlled oscillator. IEICE Electron. Express 8(21): 1801-1807 (2011) - 2010
- [c1]Arash Abadian, Mojtaba Lotfizad, Nasser Erfani Majd, Mohammad Bagher Ghaznavi Ghoushchi, H. Mirzaie:
A new low-power and low-complexity all digital PLL (ADPLL) in 180nm and 32nm. ICECS 2010: 305-310
Coauthor Index
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