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ORCIDJin Sha
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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Other persons with a similar name
- Sha Jin
- Jin-long Sha
- Jin Rui Sha
- Jinming Sha (aka: Jin-Ming Sha)
- Ting-jin Sha
- Jin-Sha Yuan
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2020 – today
- 2024
[j52]Zhenxin Cai, Yu Wang
, Qi Jiang, Guan Gui, Jin Sha:
Toward Intelligent Lightweight and Efficient UAV Identification With RF Fingerprinting. IEEE Internet Things J. 11(15): 26329-26339 (2024)- [j51]Qi Jiang, Jin Sha:
Radio Frequency Fingerprint Identification Based on Variational Autoencoder for GNSS. IEEE Geosci. Remote. Sens. Lett. 21: 1-4 (2024) - [j50]Jin Sha, Honghao Wei, Jiahao Hu:
Principle, Design, and Analysis of a Novel Discrete Pulse Control for Single-Phase Voltage Source Inverter. IEEE Trans. Ind. Electron. 71(6): 5693-5703 (2024) - [j49]Jin Sha, Jinsong Shen, Han Wang, Gaofeng Qiu, Yuebing Sun:
Hybrid Modulation-Based Discrete Extended-Phase-Shift Control for Dual-Active-Bridge DC-DC Converter. IEEE Trans. Ind. Electron. 71(12): 15633-15642 (2024) - [j48]Qi Jiang, Jin Sha:
RF Fingerprinting Identification in Low SNR Scenarios for Automatic Identification System. IEEE Trans. Wirel. Commun. 23(3): 2070-2081 (2024) - [c26]Zhenxin Cai, Jin Sha, Yu Wang, Guan Gui:
Efficient UAV Identification Leveraging Multi-Resolution Analysis and Multi-Scale ResNet. VTC Spring 2024: 1-5 - 2023
- [j47]Shangpeng Deng, Zhiyuan Xiao, Jin Sha, Zhongfeng Wang:
An Adaptive Chase-Pyndiah Algorithm for Turbo Product Codes. IEEE Commun. Lett. 27(4): 1065-1069 (2023) - [j46]Heng Liu, Jin Sha, Xiumin Wang:
An Improved Critical Set for List Decoding of Polar Codes. IEEE Commun. Lett. 27(9): 2269-2273 (2023) - [j45]Qi Jiang, Jin Sha:
The Use of SNN for Ultralow-Power RF Fingerprinting Identification With Attention Mechanisms in VDES-SAT. IEEE Internet Things J. 10(17): 15594-15603 (2023) - [j44]Lang Feng, Jin Sha, Zhongfeng Wang:
1+1 <2: Efficient Automatic Standard Cell Sharing Between Digital VLSI Designs for Area Saving. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4177-4190 (2023) - [j43]Jin Sha, Lirong Chen, Guohua Zhou:
Discrete Extended-Phase-Shift Control for Dual-Active-Bridge DC-DC Converter With Fast Dynamic Response. IEEE Trans. Ind. Electron. 70(6): 5662-5673 (2023) - [j42]Jin Sha, Jiahao Hu, Honghao Wei:
A Discrete Average Current Mode Control CCM Boost PFC Converter With Hybrid Pulse Train Modulation and Dual Edge Modulation. IEEE Trans. Ind. Electron. 70(10): 10003-10013 (2023) - [j41]Qi Jiang, Jin Sha:
RF Fingerprinting Identification Based on Spiking Neural Network for LEO-MIMO Systems. IEEE Wirel. Commun. Lett. 12(2): 287-291 (2023) - 2022
- [j40]Rui Huang, Duo Xu, Feiming Liu, Jin Sha, Jianping Xu:
Embedded Bidirectional Buck-Boost Converter in Half Bridge Class-D Audio Amplifier for Suppressing Bus Voltage Pumping. IEEE Trans. Ind. Electron. 69(2): 1454-1464 (2022) - 2021
- [j39]Dezhi Peng, Jin Sha:
Efficient HLS Implementation of Fast Linear Discriminant Analysis Classifier. IEEE Embed. Syst. Lett. 13(4): 214-217 (2021) - 2020
- [j38]Huan Luo, Jianping Xu, Dayin He, Jin Sha:
Pulse Train Control Strategy for CCM Boost PFC Converter With Improved Dynamic Response and Unity Power Factor. IEEE Trans. Ind. Electron. 67(12): 10377-10387 (2020)
2010 – 2019
- 2019
- [j37]Jing Chang, Jin Sha:
Prune Deep Neural Networks With the Modified L1/2 Penalty. IEEE Access 7: 2273-2280 (2019) - [j36]Hangqi Ge, Jin Sha:
FPGA-based low-complexity high-throughput real-time hardware accelerator for robust watermarking. J. Real Time Image Process. 16(4): 813-820 (2019) - [j35]Jin Sha, Xiao-Ming Li, Xue'en Chen, Tianyu Zhang:
Satellite Observations of Wind Wake and Associated Oceanic Thermal Responses: A Case Study of Hainan Island Wind Wake. Remote. Sens. 11(24): 3036 (2019) - [j34]Xiaozhen Liu, Jin Sha, Hongxiang Xie, Feifei Gao, Shi Jin, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Efficient Channel Estimator With Angle-Division Multiple Access. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 708-718 (2019) - [j33]Xiangyun Deng, Jin Sha, Xiaotian Zhou, Yuxiang Fu, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Joint Detection and Decoding of Polar-Coded OFDM-IDMA Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 4005-4017 (2019) - [j32]Yaping Cai, Jianping Xu, Ping Yang, Jiahui Wu, Jin Sha:
Evaluation and Suppression of a Low-Frequency Output Voltage Ripple of a Single-Stage AC-DC Converter Based on an Output Impedance Model. IEEE Trans. Ind. Electron. 66(4): 2803-2813 (2019) - [j31]Huan Luo, Jianping Xu, Yiwen Luo, Jin Sha:
A Digital Pulse Train Controlled High Power Factor DCM Boost PFC Converter Over a Universal Input Voltage Range. IEEE Trans. Ind. Electron. 66(4): 2814-2824 (2019) - [c25]Jingbo Liu, Jingyang Yuan, Jin Sha:
Symbol-Based Algorithms for Decoding Binary LDPC Codes with Higher-Order Modulations. ISCAS 2019: 1-5 - 2018
- [j30]Haochuan Song, Jen-Chien Fu, Shih-Jia Zeng, Jin Sha, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Polar-coded forward error correction for MLC NAND flash memory. Sci. China Inf. Sci. 61(10): 102307:1-102307:16 (2018) - [j29]Jinyang Yuan, Jin Sha:
4.7-Gb/s LDPC Decoder on GPU. IEEE Commun. Lett. 22(3): 478-481 (2018) - [j28]Dao Ren, Jin Sha:
Improved gradient descent bit flipping decoder for LDPC codes on BSC channel. IEICE Electron. Express 15(8): 20180195 (2018) - [j27]Wei Shen, Cheng Chen, Jin Sha:
Multi-column parallel QC-LDPC decoder architecture for NAND flash memory. IEICE Electron. Express 15(10): 20180397 (2018) - [j26]Zhongjie Chen, Jin Sha, Chuan Zhang, Feng Yan:
A low complexity LDPC-BCH concatenated decoder for NAND flash memory. IEICE Electron. Express 15(11): 20180103 (2018) - [j25]Wei Shao, Jin Sha, Chuan Zhang:
Dispersed Array LDPC Codes and Decoder Architecture for NAND Flash Memory. IEEE Trans. Circuits Syst. II Express Briefs 65-II(8): 1014-1018 (2018) - [j24]Jin Sha, Jingbo Liu, Jun Lin, Zhongfeng Wang:
A Stage-Combined Belief Propagation Decoder for Polar Codes. J. Signal Process. Syst. 90(5): 687-694 (2018) - [i2]Haochuan Song, Frankie Fu, Cloud Zeng, Jin Sha, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Polar-Coded Forward Error Correction for MLC NAND Flash Memory Polar FEC for NAND Flash Memory. CoRR abs/1802.04576 (2018) - [i1]Xiaozhen Liu, Jin Sha, Hongxiang Xie, Feifei Gao, Shi Jin, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Efficient Channel Estimator with Angle-Division Multiple Access. CoRR abs/1804.06745 (2018) - 2017
- [j23]Jing Chang, Jin Sha:
An efficient implementation of 2D convolution in CNN. IEICE Electron. Express 14(1): 20161134 (2017) - [j22]Jingbo Liu, Jin Sha:
Frozen bits selection for polar codes based on simulation and BP decoding. IEICE Electron. Express 14(6): 20170026 (2017) - [j21]Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Jin Sha, Jun Lin:
An access pattern based adaptive mapping function for GPGPU scratchpad memory. IEICE Electron. Express 14(12): 20170373 (2017) - [j20]Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin, Yuxiang Fu, Jin Sha:
Optimized sorting network for successive cancellation list decoding of polar codes. IEICE Electron. Express 14(18): 20170735 (2017) - [j19]Guanghui Hu, Jin Sha, Zhongfeng Wang:
High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1159-1163 (2017) - [c24]Xiangyun Deng, Jin Sha, Xiaotian Zhou, Xiaohu You, Chuan Zhang:
Joint detection and decoding for polar-coded OFDM-IDMA systems. ASICON 2017: 796-799 - [c23]Wei Yu, Jing Chang, Cheng Yang, Limin Zhang, Han Shen, Yongquan Xia, Jin Sha:
Automatic classification of leukocytes using deep neural network. ASICON 2017: 1041-1044 - [c22]Yiqian Cai, Jin Sha, Shusen Jing, Xiaohu You, Chuan Zhang:
Joint detection and decoding for non-binary LDPC coded MIMO systems. ASICON 2017: 1069-1072 - [c21]Xiaozhen Liu, Hongxiang Xie, Jin Sha, Feifei Gao, Shi Jin, Xiaohu You, Chuan Zhang:
The VLSI architecture for channel estimation based on ADMA. ASICON 2017: 1073-1076 - 2016
- [j18]Kai Huang, Jin Sha, Wei Shi, Zhongfeng Wang:
An Efficient FPGA Implementation for 2-D MUSIC Algorithm. Circuits Syst. Signal Process. 35(5): 1795-1805 (2016) - [j17]Fei Lyu, Xinfu Liu, Yinjie Ding, Eng-Huat Toh, Zhenyan Zhang, Yifan Pan, Zhen Wang, Chengjie Li, Li Li, Jin Sha, Hongbing Pan:
Influences of an Aluminum Covering Layer on the Performance of Cross-Like Hall Devices. Sensors 16(1): 106 (2016) - [j16]Jin Sha, Duo Xu, Yiming Chen, Jianping Xu, Barry W. Williams:
A Peak-Capacitor-Current Pulse-Train-Controlled Buck Converter With Fast Transient Response and a Wide Load Range. IEEE Trans. Ind. Electron. 63(3): 1528-1538 (2016) - [c20]Jun Lin, Jin Sha, Li Li, Chenrong Xiong, Zhiyuan Yan, Zhongfeng Wang:
A high throughput belief propagation decoder architecture for polar codes. ISCAS 2016: 153-156 - [c19]Jin Sha, Jun Lin, Zhongfeng Wang:
Stage-combined belief propagation decoding of polar codes. ISCAS 2016: 421-424 - [c18]Guanghui Hu, Jin Sha, Zhongfeng Wang:
Beyond 100Gbps Encoder Design for Staircase Codes. SiPS 2016: 154-158 - 2015
- [j15]Fei Lyu, Zhenyan Zhang, Eng-Huat Toh, Xinfu Liu, Yinjie Ding, Yifan Pan, Chengjie Li, Li Li, Jin Sha, Hongbing Pan:
Performance Comparison of Cross-Like Hall Plates with Different Covering Layers. Sensors 15(1): 672-686 (2015) - [j14]Jin Sha, Jianping Xu, Shu Zhong, Shuhan Liu, Lijun Xu:
Control Pulse Combination-Based Analysis of Pulse Train Controlled DCM Switching DC-DC Converters. IEEE Trans. Ind. Electron. 62(1): 246-255 (2015) - [c17]Xing Liu, Jin Sha, Chuan Zhang, Zhongfeng Wang:
A stage-reduced low-latency successive cancellation decoder for polar codes. DSP 2015: 258-262 - [c16]Guanghui Hu, Jin Sha:
Tail-biting code: A modification to staircase code for high-speed networking. SiPS 2015: 1-5 - 2014
- [j13]Jin Sha, Jianping Xu, Bocheng Bao, Tiesheng Yan:
Effects of Circuit Parameters on Dynamics of Current-Mode-Pulse-Train-Controlled Buck Converter. IEEE Trans. Ind. Electron. 61(3): 1562-1573 (2014) - [j12]Tiesheng Yan, Jianping Xu, Fei Zhang, Jin Sha, Zheng Dong:
Variable-On-Time-Controlled Critical-Conduction-Mode Flyback PFC Converter. IEEE Trans. Ind. Electron. 61(11): 6091-6099 (2014) - [c15]Chuan Zhang, Xiaohu You, Jin Sha:
Hardware architecture for list successive cancellation polar decoder. ISCAS 2014: 209-212 - [c14]Leixin Zhou, Jin Sha, Yun Chen, Chuan Zhang, Zhongfeng Wang:
Efficient symbol reliability based decoding for QCNB-LDPC codes. ISCAS 2014: 405-408 - [c13]Fei Lyu, Zhenduo Zhu, Zhenfei Lu, Li Li, Jin Sha, Hongbing Pan, Yutong Bi:
A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs. ISIC 2014: 524-527 - 2013
- [c12]Leixin Zhou, Jin Sha, Yun Chen, Zhongfeng Wang:
Memory efficient EMS decoding for non-binary LDPC codes. ISCAS 2013: 1336-1339 - 2012
- [j11]Kai He, Jin Sha, Zhongfeng Wang:
Nonbinary LDPC Code Decoder Architecture With Efficient Check Node Processing. IEEE Trans. Circuits Syst. II Express Briefs 59-II(6): 381-385 (2012) - [j10]Li Li, Bo Yuan, Zhongfeng Wang, Jin Sha, Hongbing Pan, Weishan Zheng:
Unified Architecture for Reed-Solomon Decoder Combined With Burst-Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 20(7): 1346-1350 (2012) - [c11]Kai He, Jin Sha, Zhongfeng Wang:
Memory efficient column-layered decoder design for non-binary LDPC codes. ISCAS 2012: 2613-2616 - [c10]Chuan Zhang, Jin Sha:
Efficient network for non-binary QC-LDPC decoder. ISCAS 2012: 2617-2620 - [c9]Leixin Zhou, Jin Sha, Zhongfeng Wang:
Efficient EMS decoding for non-binary LDPC codes. ISOCC 2012: 339-342 - 2011
- [c8]Kai He, Jin Sha, Zhongfeng Wang:
Memory efficient decoder design of nonbinary LDPC codes. ISOCC 2011: 44-47 - [c7]Chuan Zhang, Sang-Min Kim, Jin Sha:
Efficient Reed-Solomon based LDPC decoders. ISOCC 2011: 58-61 - 2010
- [j9]Jun Lin, Jin Sha, Zhongfeng Wang, Li Li:
An Efficient VLSI Architecture for Nonbinary LDPC Decoders. IEEE Trans. Circuits Syst. II Express Briefs 57-II(1): 51-55 (2010) - [j8]Chuan Zhang, Zhongfeng Wang, Jin Sha, Li Li, Jun Lin:
Flexible LDPC Decoder Design for Multigigabit-per-Second Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 116-124 (2010) - [j7]Jun Lin, Jin Sha, Zhongfeng Wang, Li Li:
Efficient Decoder Design for Nonbinary Quasicyclic LDPC Codes. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(5): 1071-1082 (2010) - [c6]Shuai Zhou, Jin Sha, Li Li, Zhongfeng Wang:
Layered decoding for non-binary LDPC codes. ISCAS 2010: 481-484 - [c5]Kai He, Jin Sha, Li Li, Zhongfeng Wang:
Low power decoder design for QC-LDPC codes. ISCAS 2010: 3937-3940
2000 – 2009
- 2009
- [j6]Jun Lin, Zhongfeng Wang, Li Li, Jin Sha, Minglun Gao:
Efficient Shuffle Network Architecture and Application for WiMAX LDPC Decoders. IEEE Trans. Circuits Syst. II Express Briefs 56-II(3): 215-219 (2009) - [j5]Bo Yuan, Zhongfeng Wang, Li Li, Minglun Gao, Jin Sha, Chuan Zhang:
Area-efficient reed-solomon decoder design for optical communications. IEEE Trans. Circuits Syst. II Express Briefs 56-II(6): 469-473 (2009) - [j4]Jin Sha, Jun Lin, Zhongfeng Wang, Li Li, Minglun Gao:
Decoder Design for RS-Based LDPC Codes. IEEE Trans. Circuits Syst. II Express Briefs 56-II(9): 724-728 (2009) - [j3]Jin Sha, Jun Lin, Zhongfeng Wang, Li Li, Minglun Gao:
LDPC decoder design for high rate wireless personal area networks. IEEE Trans. Consumer Electron. 55(2): 455-460 (2009) - [j2]Zhigang Wu, Jin Sha, Zhongfeng Wang, Li Li, Minglun Gao:
An improved scaled DCT architecture. IEEE Trans. Consumer Electron. 55(2): 685-689 (2009) - [j1]Jin Sha, Zhongfeng Wang, Minglun Gao, Li Li:
Multi-Gb/s LDPC Code Design and Implementation. IEEE Trans. Very Large Scale Integr. Syst. 17(2): 262-268 (2009) - [c4]Jin Sha, Jun Lin, Li Li, Minglun Gao, Zhongfeng Wang:
LDPC Decoder Design for IEEE 802.15 Standard. ISCAS 2009: 2441-2444 - [c3]Bo Yuan, Li Li, Jin Sha, Zhongfeng Wang:
Area-efficient Reed-Solomon Decoder Design for 10-100 Gb/s Applications. ISCAS 2009: 2681-2684 - [c2]Jun Lin, Jin Sha, Zhongfeng Wang, Li Li:
An improved min-sum based column-layered decoding algorithm for LDPC codes. SiPS 2009: 238-242 - 2006
- [c1]Jin Sha, Minglun Gao, Zhongjin Zhang, Li Li, Zhongfeng Wang:
An FPGA Implementation of Array LDPC Decoder. APCCAS 2006: 1675-1678
Coauthor Index
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