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2020 – today
- 2022
[c6]Nunziato Cassavia
, Luca Caviglione, Massimo Guarascio, Angelica Liguori, Giuseppe Surace, Marco Zuppelli:
Federated Learning for the Efficient Detection of Steganographic Threats Hidden in Image Icons. PerSOM 2022: 83-95- 2020
- [j1]Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, Kiarash Gharibdoust, Davide Gorret, Amit Gupta, Christopher Hall, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Yohann Mogentale, Victor Perrin, John Phillips, Sumathi Raparthy, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Emanuele Truffa, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET. IEEE J. Solid State Circuits 55(4): 1108-1123 (2020) - [c5]Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, Kiarash Gharibdoust, Amit Gupta, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
Short-Reach and Pin-Efficient Interfaces Using Correlated NRZ. CICC 2020: 1-8
2010 – 2019
- 2019
- [c4]Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, John Fox, Kiarash Gharibdoust, Davide Gorret, Amit Gupta, Christopher Hall, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Yohann Mogentale, G. Paul, Victor Perrin, John Phillips, Sumathi Raparthy, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Emanuele Truffa, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
A 1.02pJ/b 417Gb/s/mm USR Link in 16nm FinFET. VLSI Circuits 2019: 92- - 2016
- [c3]Amin Shokrollahi, Dario Albino Carnelli, John Fox, Klaas L. Hofstra, Brian Holden, Ali Hormati, Peter Hunt, Margaret Johnston, John Keay, Sergio Pesenti, Richard Simpson, David Stauffer, Andrew Stewart, Giuseppe Surace, Armin Tajalli, Omid Talebi Amiri, Anton Tschank, Roger Ulrich, Christoph Walter, Fabio Licciardello, Yohann Mogentale, Anant Singh:
10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS. ISSCC 2016: 182-183 - 2014
- [c2]Anant Singh, Dario Albino Carnelli, Altay Falay, Klaas L. Hofstra, Fabio Licciardello, Kia Salimi, Hugo Santos, Amin Shokrollahi, Roger Ulrich, Christoph Walter, John Fox, Peter Hunt, John Keay, Richard Simpson, Andrew Stewart, Giuseppe Surace, Harm S. Cronie:
26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology. ISSCC 2014: 442-443 - 2011
- [c1]Andrew K. Joy, Hugh Mair, Hae-Chang Lee, Arnold Feldman, Clemenz L. Portmann, Neil Bulman, Eugenia Cordero Crespo, Peter Hearne, Patty Huang, Ben Kerr, Pulkit Khandelwal, Franz Kuhlmann, Shaun Lytollis, Joaquim Machado, Casey Morrison, Scott Morrison, Shahriar Rabii, Dushmantha Rajapaksha, Vishnu Ravinuthula, Giuseppe Surace:
Analog-DFE-based 16Gb/s SerDes in 40nm CMOS that operates across 34dB loss channels at Nyquist with a baud rate CDR and 1.2Vpp voltage-mode driver. ISSCC 2011: 350-351
Coauthor Index
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