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2020 – today
- 2024
[c15]Hsuan Chang
, Yi-Ping You:
Interference-Aware Function Inlining for Code Size Reduction. ICPP Workshops 2024: 7-14- 2023
- [j15]Yu-Sheng Hsieh, Yi-Ping You:
DLOOPT: An Optimization Assistant on AutoTVM for Deep Learning Operators. J. Signal Process. Syst. 95(5): 585-607 (2023) - [c14]Jia-Sian Hong, Yi-Ping You:
Mapping-Free GPU Offloading in OpenMP Using Unified Memory. ICPP Workshops 2023: 104-111 - 2022
- [j14]Jyun-Siang Huang, Wuu Yang, Yi-Ping You:
Profile-guided optimisation for indirect branches in a binary translator. Connect. Sci. 34(1): 749-765 (2022) - [j13]Yi-Ping You, Yi-Chiao Su:
Reduced O3 subsequence labelling: a stepping stone towards optimisation sequence prediction. Connect. Sci. 34(1): 2860-2877 (2022) - [c13]Yi-An Chen, Yi-Ping You:
Structured Concurrency: A Review. ICPP Workshops 2022: 16:1-16:8 - [c12]An-Chi Liu, Yi-Ping You:
Offworker: An Offloading Framework for Parallel Web Applications. WISE 2022: 170-185
2010 – 2019
- 2019
- [j12]Ming-Tsung Chiu, Yi-Ping You:
CLPKM: A checkpoint-based preemptive multitasking framework for OpenCL kernels. J. Syst. Archit. 98: 53-62 (2019) - [c11]Yi-Ping You, Tsung-Chun Lin, Wuu Yang:
Translating AArch64 Floating-Point Instruction Set to the x86-64 Platform. ICPP Workshops 2019: 12:1-12:7 - 2018
- [c10]Ming-Tsung Chiu, Yi-Ping You:
Enabling OpenCL Preemptive Multitasking Using Software Checkpointing. ICPP Workshops 2018: 15:1-15:7 - 2016
- [j11]Yi-Ping You, Jian-Ru Chen:
A static region-based compiler for the Dalvik virtual machine. Softw. Pract. Exp. 46(8): 1109-1130 (2016) - [j10]Yi-Ping You, Szu-Chien Chen:
VecRA: A Vector-Aware Register Allocator for GPU Shader Processors. ACM Trans. Embed. Comput. Syst. 15(4): 64:1-64:30 (2016) - 2015
- [c9]Yi-Ping You, Szu-Chieh Chen:
Vector-aware register allocation for GPU shader processors. CASES 2015: 99-108 - [c8]Yi-Ping You, Hen-Jung Wu, Yeh-Ning Tsai, Yen-Ting Chao:
VirtCL: a framework for OpenCL device abstraction and management. PPoPP 2015: 161-172 - 2014
- [j9]Tsan-Rong Tien, Yi-Ping You:
Enabling OpenCL support for GPGPU in Kernel-based Virtual Machine. Softw. Pract. Exp. 44(5): 483-510 (2014) - [j8]Wen-Li Shih, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee:
Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs. ACM Trans. Design Autom. Electr. Syst. 20(1): 9:1-9:34 (2014) - 2013
- [j7]Yi-Ping You, Shen-Hong Wang:
Energy-aware code motion for GPU shader processors. ACM Trans. Embed. Comput. Syst. 13(3): 49:1-49:24 (2013)
2000 – 2009
- 2009
- [j6]Chia-Han Lu, Yung-Chia Lin, Yi-Ping You, Jenq Kuen Lee:
LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files. Concurr. Comput. Pract. Exp. 21(1): 101-114 (2009) - 2008
- [j5]Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chiao Moo, Jenq Kuen Lee:
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores. J. Signal Process. Syst. 51(3): 269-288 (2008) - 2007
- [j4]Yung-Chia Lin, Yi-Ping You, Jenq Kuen Lee:
PALF: compiler supports for irregular register files in clustered VLIW DSP processors. Concurr. Comput. Pract. Exp. 19(18): 2391-2406 (2007) - [j3]Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, TingTing Hwang:
Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains. J. Supercomput. 42(2): 201-223 (2007) - [j2]Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee:
Compilation for compact power-gating controls. ACM Trans. Design Autom. Electr. Syst. 12(4): 51 (2007) - [c7]Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq Kuen Lee:
Enabling compiler flow for embedded VLIW DSP processors with distributed register files. LCTES 2007: 146-148 - 2006
- [j1]Yi-Ping You, Chingren Lee, Jenq Kuen Lee:
Compilers for leakage power reduction. ACM Trans. Design Autom. Electr. Syst. 11(1): 147-164 (2006) - [c6]Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu, Wen-Li Shih, Shih-Chang Chen, Chung-Kai Chen, Chien-Ching Huang, Yi-Ping You, Jenq Kuen Lee:
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors. RTCSA 2006: 215-222 - 2005
- [c5]Yi-Ping You, Chun-Yen Tseng, Yu-Hui Huang, Po-Chiun Huang, TingTing Hwang, Sheng-Yu Hsu:
Low-power techniques for network security processors. ASP-DAC 2005: 355-360 - [c4]Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee:
A sink-n-hoist framework for leakage power reduction. EMSOFT 2005: 124-133 - [c3]Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee:
Compiler Supports and Optimizations for PAC VLIW DSP Processors. LCPC 2005: 466-474 - 2004
- [c2]Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, TingTing Hwang:
Power-Aware Scheduling for Parallel Security Processors with Analytical Models. LCPC 2004: 470-484 - 2002
- [c1]Yi-Ping You, Chingren Lee, Jenq Kuen Lee:
Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors. LCPC 2002: 45-60
Coauthor Index
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