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Holger Gryska
Matthias Müller 0002 Sven Simon 0001 Holger Gryska Andreas Wortmann 0002 Steffen Buch Low power synthesizable register files for processor and IP cores. 131-155 2006 39 Integr. 2 https://doi.org/10.1016/j.vlsi.2004.08.001 db/journals/integration/integration39.html#MullerSGWB06
Vijayakumar Kalyanaraman Matthias Müller 0002 Sven Simon 0001 Mario Steinert Holger Gryska A power dissipation comparison of ALU-architectures for ASIPs. 217-220 2005 ECCTD https://doi.org/10.1109/ECCTD.2005.1523032 conf/ecctd/2005 db/conf/ecctd/ecctd2005.html#KalyanaramanMSS05 Vijayakumar Kalyanaraman Matthias Müller 0002 Sven Simon 0001 Mario Steinert Holger Gryska Power reduction of ASIPs by distributing the workload on several ASIP-instances. 457-460 2005 ECCTD https://doi.org/10.1109/ECCTD.2005.1523159 conf/ecctd/2005 db/conf/ecctd/ecctd2005.html#KalyanaramanMSS05a Sven Simon 0001 Matthias Müller 0002 Holger Gryska Andreas Wortmann 0002 Steffen Buch An instruction set for the efficient implementation of the CORDIC algorithm. 357-360 2004 conf/iscas/2004 ISCAS (2) db/conf/iscas/iscas2004-2.html#SimonMGWB04 Steffen Buch Vijayakumar Kalyanaraman Matthias Müller 0002 Sven Simon 0001 Mario Steinert Andreas Wortmann 0002