iBet uBet web content aggregator. Adding the entire web to your favor.

Link to original content: https://dblp.org/pid/61/6921-8.ris

Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/isvlsi/OvyRXXNG24 AU - Ovy, Sanwar Ahmed AU - Romel, Md Ashraful Islam AU - Xiao, Yi AU - Xu, Yixin AU - Ni, Kai AU - George, Sumitha TI - Compact Multiplexer Design with Multi-threshold Ferroelectric FETs. BT - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2024, Knoxville, TN, USA, July 1-3, 2024 SP - 735 EP - 739 PY - 2024// DO - 10.1109/ISVLSI61997.2024.00142 UR - https://doi.org/10.1109/ISVLSI61997.2024.00142 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2403-04981 AU - Zhao, Zijian AU - Woo, Sola AU - Aabrar, Khandker Akif AU - Kirtania, Sharadindu Gopal AU - Jiang, Zhouhang AU - Deng, Shan AU - Xiao, Yi AU - Mulaosmanovic, Halid AU - Dünkel, Stefan AU - Kleimaier, Dominik AU - Soss, Steven AU - Beyer, Sven AU - Joshi, Rajiv V. AU - Meninger, Scott AU - Mohamed, Mohamed AU - Kim, Kijoon AU - Woo, Jongho AU - Lim, Suhwan AU - Kim, Kwangsoo AU - Kim, Wanki AU - Ha, Daewon AU - Narayanan, Vijaykrishnan AU - Datta, Suman AU - Yu, Shimeng AU - Ni, Kai TI - Paving the Way for Pass Disturb Free Vertical NAND Storage via A Dedicated and String-Compatible Pass Gate. JO - CoRR VL - abs/2403.04981 PY - 2024// DO - 10.48550/ARXIV.2403.04981 UR - https://doi.org/10.48550/arXiv.2403.04981 ER - TY - CPAPER ID - DBLP:conf/drc/NiXDN23 AU - Ni, Kai AU - Xiao, Yi AU - Deng, Shan AU - Narayanan, Vijaykrishnan TI - Computational Associative Memory Powered by Ferroelectric Memory. BT - Device Research Conference, DRC 2023, Santa Barbara, CA, USA, June 25-28, 2023 SP - 1 EP - 2 PY - 2023// DO - 10.1109/DRC58590.2023.10187048 UR - https://doi.org/10.1109/DRC58590.2023.10187048 ER - TY - CPAPER ID - DBLP:conf/isvlsi/XiaoXDZGNN23 AU - Xiao, Yi AU - Xu, Yixin AU - Deng, Shan AU - Zhao, Zijian AU - George, Sumitha AU - Ni, Kai AU - Narayanan, Vijaykrishnan TI - A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory. BT - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2023, Foz do Iguacu, Brazil, June 20-23, 2023 SP - 1 EP - 6 PY - 2023// DO - 10.1109/ISVLSI59464.2023.10238503 UR - https://doi.org/10.1109/ISVLSI59464.2023.10238503 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2305-01484 AU - Zhao, Zijian AU - Deng, Shan AU - Chatterjee, Swetaki AU - Jiang, Zhouhang AU - Islam, Muhammad Shaffatul AU - Xiao, Yi AU - Xu, Yixin AU - Meninger, Scott AU - Mohamed, Mohamed AU - Joshi, Rajiv V. AU - Chauhan, Yogesh Singh AU - Mulaosmanovic, Halid AU - Dünkel, Stefan AU - Kleimaier, Dominik AU - Beyer, Sven AU - Amrouch, Hussam AU - Narayanan, Vijaykrishnan AU - Ni, Kai TI - Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET. JO - CoRR VL - abs/2305.01484 PY - 2023// DO - 10.48550/ARXIV.2305.01484 UR - https://doi.org/10.48550/arXiv.2305.01484 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2306-01863 AU - Xu, Yixin AU - Xiao, Yi AU - Zhao, Zijian AU - Müller, Franz AU - Vardar, Alptekin AU - Gong, Xiao AU - George, Sumitha AU - Kämpfe, Thomas AU - Narayanan, Vijaykrishnan AU - Ni, Kai TI - Embedding Security into Ferroelectric FET Array via In-Situ Memory Operation. JO - CoRR VL - abs/2306.01863 PY - 2023// DO - 10.48550/ARXIV.2306.01863 UR - https://doi.org/10.48550/arXiv.2306.01863 ER - TY - CPAPER ID - DBLP:conf/date/RamanathanMXN22 AU - Ramanathan, Akshay Krishna AU - Mahdizadeh-Shahri, Sara AU - Xiao, Yi AU - Narayanan, Vijaykrishnan TI - Achieving Crash Consistency by Employing Persistent L1 Cache. BT - 2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022 SP - 1407 EP - 1412 PY - 2022// DO - 10.23919/DATE54114.2022.9774777 UR - https://doi.org/10.23919/DATE54114.2022.9774777 ER - TY - CPAPER ID - DBLP:conf/vlsit/JiangXCMDSBJCAN22 AU - Jiang, Zhouhang AU - Xiao, Yi AU - Chatterjee, Swetaki AU - Mulaosmanovic, Halid AU - Dünkel, Stefan AU - Soss, Steven AU - Beyer, Sven AU - Joshi, Rajiv V. AU - Chauhan, Yogesh Singh AU - Amrouch, Hussam AU - Narayanan, Vijaykrishnan AU - Ni, Kai TI - Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window. BT - IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022 SP - 395 EP - 396 PY - 2022// DO - 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830172 UR - https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830172 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2205-14729 AU - Mallick, Antik AU - Zhao, Zijian AU - Bashar, Mohammad Khairul AU - Alam, Shamiul AU - Islam, Md. Mazharul AU - Xiao, Yi AU - Xu, Yixin AU - Aziz, Ahmedullah AU - Narayanan, Vijaykrishnan AU - Ni, Kai AU - Shukla, Nikhil TI - CMOS-Compatible Ising Machines built using Bistable Latches Coupled through Ferroelectric Transistor Arrays. JO - CoRR VL - abs/2205.14729 PY - 2022// DO - 10.48550/ARXIV.2205.14729 UR - https://doi.org/10.48550/arXiv.2205.14729 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2212-00089 AU - Xu, Yixin AU - Zhao, Zijian AU - Xiao, Yi AU - Yu, Tongguang AU - Mulaosmanovic, Halid AU - Kleimaier, Dominik AU - Dünkel, Stefan AU - Beyer, Sven AU - Gong, Xiao AU - Joshi, Rajiv V. AU - Hu, X. Sharon AU - Wen, Shixian AU - Rios, Amanda Sofie AU - Lekkala, Kiran AU - Itti, Laurent AU - Homan, Eric AU - George, Sumitha AU - Narayanan, Vijaykrishnan AU - Ni, Kai TI - Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines. JO - CoRR VL - abs/2212.00089 PY - 2022// DO - 10.48550/ARXIV.2212.00089 UR - https://doi.org/10.48550/arXiv.2212.00089 ER - TY - CPAPER ID - DBLP:conf/glvlsi/DengZK0XYN21 AU - Deng, Shan AU - Zhao, Zijian AU - Kurinec, Santosh AU - Ni, Kai AU - Xiao, Yi AU - Yu, Tongguang AU - Narayanan, Vijaykrishnan TI - Overview of Ferroelectric Memory Devices and Reliability Aware Design Optimization. BT - GLSVLSI '21: Great Lakes Symposium on VLSI 2021, Virtual Event, USA, June 22-25, 2021. SP - 473 EP - 478 PY - 2021// DO - 10.1145/3453688.3461743 UR - https://doi.org/10.1145/3453688.3461743 ER -