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2010 – 2019
- 2017
[c11]K. Kang, Peter Yiannacouras:
Host Pipes: Direct Streaming Interface Between OpenCL Host and Kernel. IWOCL 2017: 25:1-25:2- 2016
- [p1]Deshanand P. Singh
, Peter Yiannacouras:
OpenCL. FPGAs for Software Programmers 2016: 97-114 - 2012
- [j4]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
Portable, Flexible, and Scalable Soft Vector Processors. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1429-1442 (2012) - [c10]Tomasz S. Czajkowski, Utku Aydonat, Dmitry Denisenko, John Freeman, Michael Kinsner, David Neto, Jason Wong, Peter Yiannacouras, Deshanand P. Singh:
From opencl to high-performance hardware on FPGAS. FPL 2012: 531-534
2000 – 2009
- 2009
- [c9]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
Fine-grain performance scaling of soft vector processors. CASES 2009: 97-106 - [c8]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. FPGA 2009: 277 - [c7]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
Data parallel FPGA workloads: Software versus hardware. FPL 2009: 51-58 - 2008
- [j3]Shih-Lien Lu, Peter Yiannacouras, Taeweon Suh, Rolf Kassa, Michael Konow:
A Desktop Computer with a Reconfigurable Pentium®. ACM Trans. Reconfigurable Technol. Syst. 1(1): 5:1-5:15 (2008) - [c6]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
VESPA: portable, scalable, and flexible FPGA-based vector processors. CASES 2008: 61-70 - [c5]Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan:
Scaling Soft Processor Systems. FCCM 2008: 195-205 - 2007
- [j2]Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan:
Custom code generation for soft processors. SIGARCH Comput. Archit. News 35(3): 9-19 (2007) - [j1]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
Exploration and Customization of FPGA-Based Soft Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 266-277 (2007) - [c4]Shih-Lien Lu, Peter Yiannacouras, Rolf Kassa, Michael Konow, Taeweon Suh:
An FPGA-based Pentium in a complete desktop system. FPGA 2007: 53-59 - 2006
- [c3]Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose:
Application-specific customization of soft processor microarchitecture. FPGA 2006: 201-210 - 2005
- [c2]Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan:
The microarchitecture of FPGA-based soft processors. CASES 2005: 202-212 - 2003
- [c1]Peter Yiannacouras, Jonathan Rose:
A parameterized automatic cache generator for FPGAs. FPT 2003: 324-327
Coauthor Index
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