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Victor Lomné
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2020 – today
- 2021
- [c20]Thomas Roche, Victor Lomné, Camille Mutschler, Laurent Imbert:
A Side Journey To Titan. USENIX Security Symposium 2021: 231-248 - [i6]Victor Lomné, Thomas Roche:
A Side Journey to Titan. IACR Cryptol. ePrint Arch. 2021: 28 (2021)
2010 – 2019
- 2019
- [c19]Thomas Roche, Laurent Imbert, Victor Lomné:
Side-Channel Attacks on Blinded Scalar Multiplications Revisited. CARDIS 2019: 95-108 - [i5]Thomas Roche, Laurent Imbert, Victor Lomné:
Side-channel Attacks on Blinded Scalar Multiplications Revisited. IACR Cryptol. ePrint Arch. 2019: 1220 (2019) - 2017
- [c18]Shivam Bhasin, Victor Lomné, Karim Tobich:
An Industrial Outlook on Challenges of Hardware Security in Digital Economy - Extended Abstract -. SPACE 2017: 1-9 - 2016
- [j3]Florent Bruguier, Pascal Benoit, Lionel Torres, Lyonel Barthe, Morgan Bourree, Victor Lomné:
Cost-Effective Design Strategies for Securing Embedded Processors. IEEE Trans. Emerg. Top. Comput. 4(1): 60-72 (2016) - [c17]Christoph Dobraunig, Maria Eichlseder, Thomas Korak, Victor Lomné, Florian Mendel:
Statistical Fault Attacks on Nonce-Based Authenticated Encryption Schemes. ASIACRYPT (1) 2016: 369-395 - [i4]Christoph Dobraunig, Maria Eichlseder, Thomas Korak, Victor Lomné, Florian Mendel:
Practical Fault Attacks on Authenticated Encryption Modes for AES. IACR Cryptol. ePrint Arch. 2016: 616 (2016) - 2015
- [e1]Naofumi Homma, Victor Lomné:
2015 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2015, Saint Malo, France, September 13, 2015. IEEE Computer Society 2015, ISBN 978-1-4673-7579-5 [contents] - 2014
- [j2]Christophe Clavier, Jean-Luc Danger, Guillaume Duc, M. Abdelaziz Elaabid, Benoît Gérard, Sylvain Guilley, Annelie Heuser, Michael Kasper, Yang Li, Victor Lomné, Daisuke Nakatsu, Kazuo Ohta, Kazuo Sakiyama, Laurent Sauvage, Werner Schindler, Marc Stöttinger, Nicolas Veyrat-Charvillon, Matthieu Walle, Antoine Wurcker:
Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest. J. Cryptogr. Eng. 4(4): 259-274 (2014) - [c16]Victor Lomné, Emmanuel Prouff, Matthieu Rivain, Thomas Roche, Adrian Thillard:
How to Estimate the Success Rate of Higher-Order Side-Channel Attacks. CHES 2014: 35-54 - [c15]Aurélie Bauer, Éliane Jaulmes, Victor Lomné, Emmanuel Prouff, Thomas Roche:
Side-Channel Attack against RSA Key Generation Algorithms. CHES 2014: 223-241 - [i3]Victor Lomné, Emmanuel Prouff, Matthieu Rivain, Thomas Roche, Adrian Thillard:
How to Estimate the Success Rate of Higher-Order Side-Channel Attacks. IACR Cryptol. ePrint Arch. 2014: 673 (2014) - 2013
- [c14]Victor Lomné, Emmanuel Prouff, Thomas Roche:
Behind the Scene of Side Channel Attacks. ASIACRYPT (1) 2013: 506-525 - [c13]Thomas Roche, Victor Lomné:
Collision-Correlation Attack against Some 1st-Order Boolean Masking Schemes in the Context of Secure Devices. COSADE 2013: 114-136 - [c12]Thomas Fuhr, Éliane Jaulmes, Victor Lomné, Adrian Thillard:
Fault Attacks on AES with Faulty Ciphertexts Only. FDTC 2013: 108-118 - [c11]Ryad Benadjila, Jian Guo, Victor Lomné, Thomas Peyrin:
Implementing Lightweight Block Ciphers on x86 Architectures. Selected Areas in Cryptography 2013: 324-351 - [i2]Ryad Benadjila, Jian Guo, Victor Lomné, Thomas Peyrin:
Implementing Lightweight Block Ciphers on x86 Architectures. IACR Cryptol. ePrint Arch. 2013: 445 (2013) - [i1]Victor Lomné, Emmanuel Prouff, Thomas Roche:
Behind the Scene of Side Channel Attacks. IACR Cryptol. ePrint Arch. 2013: 794 (2013) - 2012
- [j1]Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert, Philippe Maurine:
Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 573-577 (2012) - [c10]Victor Lomné, Thomas Roche, Adrian Thillard:
On the Need of Randomness in Fault Attack Countermeasures - Application to AES. FDTC 2012: 85-94 - 2011
- [c9]Thomas Roche, Victor Lomné, Karim Khalfallah:
Combined Fault and Side-Channel Attack on Protected Implementations of AES. CARDIS 2011: 65-83 - [c8]Sylvain Guilley, Karim Khalfallah, Victor Lomné, Jean-Luc Danger:
Formal Framework for the Evaluation of Waveform Resynchronization Algorithms. WISTP 2011: 100-115 - 2010
- [c7]Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert:
Differential Power Analysis enhancement with statistical preprocessing. DATE 2010: 1301-1304 - [c6]Victor Lomné, Philippe Maurine, Lionel Torres, Thomas Ordas, Mathieu Lisart, Jérome Toublanc:
Modeling Time Domain Magnetic Emissions of ICs. PATMOS 2010: 238-249 - [c5]Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres:
A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks. SBCCI 2010: 115-120
2000 – 2009
- 2009
- [c4]Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans:
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE 2009: 634-639 - [c3]Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert:
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC 2009: 135-155 - 2008
- [c2]Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans:
Triple Rail Logic Robustness against DPA. ReConFig 2008: 415-420 - [c1]Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert:
Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198
Coauthor Index
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