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2020 – today
- 2024
[j31]Ataberk Olgun
, F. Nisa Bostanci, Geraldo Francisco de Oliveira Junior, Yahya Can Tugrul, Rahul Bera, Abdullah Giray Yaglikçi, Hasan Hassan, Oguz Ergin, Onur Mutlu:
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture. ACM Trans. Archit. Code Optim. 21(3): 60:1-60:29 (2024)- [c46]Julian Pavon, Iván Vargas Valdivieso, Carlos Rojas, César Hernández, Mehmet Aslan, Roger Figueras, Yichao Yuan, Joël Lindegger, Mohammed Alser, Francesc Moll, Santiago Marco-Sola, Oguz Ergin, Nishil Talati, Onur Mutlu, Osman S. Unsal, Mateo Valero, Adrián Cristal:
QUETZAL: Vector Acceleration Framework for Modern Genome Sequence Analysis Algorithms. ISCA 2024: 597-612 - [c45]Oguzhan Canpolat, A. Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yuksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu:
BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads. MICRO 2024: 915-934 - [i18]Oguzhan Canpolat, Abdullah Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yüksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu:
Leveraging Adversarial Detection to Enable Scalable and Low Overhead RowHammer Mitigations. CoRR abs/2404.13477 (2024) - [i17]Oguzhan Canpolat, A. Giray Yaglikçi, Geraldo F. Oliveira, Ataberk Olgun, Oguz Ergin, Onur Mutlu:
Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance. CoRR abs/2406.19094 (2024) - 2023
- [j30]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu:
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM. ACM Trans. Archit. Code Optim. 20(1): 8:1-8:31 (2023) - [j29]Ataberk Olgun, Hasan Hassan, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Lois Orosa, Haocong Luo, Minesh Patel, Oguz Ergin, Onur Mutlu:
DRAM Bender: An Extensible and Versatile FPGA-Based Infrastructure to Easily Test State-of-the-Art DRAM Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5098-5112 (2023) - [c44]Alperen Bolat, Yahya Can Tugrul, Seyyid Hikmet Çelik, Sakir Sezer, Marco Ottavi, Oguz Ergin:
DEV-PIM: Dynamic Execution Validation with Processing-in-Memory. ETS 2023: 1-6 - 2022
- [j28]Fahrettin Koc, Behzad Salami, Oguz Ergin, Osman S. Unsal, Adrián Cristal Kestelman:
Can We Trust Undervolting in FPGA-Based Deep Learning Designs at Harsh Conditions? IEEE Micro 42(3): 57-65 (2022) - [j27]Ismail Emir Yüksel, Behzad Salami, Oguz Ergin, Osman Sabri Unsal, Adrián Cristal Kestelman:
MoRS: An Approximate Fault Modeling Framework for Reduced-Voltage SRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1663-1673 (2022) - [j26]Kerem Arikan, Alessandro Palumbo, Luca Cassano, Pedro Reviriego, Salvatore Pontarelli, Giuseppe Bianchi, Oguz Ergin, Marco Ottavi:
Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 938-951 (2022) - [c43]Alperen Bolat, Seyyid Hikmet Çelik, Ataberk Olgun, Oguz Ergin, Marco Ottavi:
ERIC: An Efficient and Practical Software Obfuscation Framework. DSN 2022: 466-474 - [c42]F. Nisa Bostanci, Ataberk Olgun, Lois Orosa, Abdullah Giray Yaglikçi, Jeremie S. Kim, Hasan Hassan, Oguz Ergin, Onur Mutlu:
DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators. HPCA 2022: 1141-1155 - [c41]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu:
PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques. ISVLSI 2022: 267-272 - [c40]Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa, Oguz Ergin, Onur Mutlu:
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. MICRO 2022: 815-834 - [c39]Daniel Townley, Kerem Arikan, Yu David Liu, Dmitry Ponomarev, Oguz Ergin:
Composable Cachelets: Protecting Enclaves from Cache Side-Channel Attacks. USENIX Security Symposium 2022: 2839-2856 - [i16]Nisa Bostanci, Ataberk Olgun, Lois Orosa, Abdullah Giray Yaglikçi, Jeremie S. Kim, Hasan Hassan, Oguz Ergin, Onur Mutlu:
DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators. CoRR abs/2201.01385 (2022) - [i15]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu:
PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques. CoRR abs/2206.00263 (2022) - [i14]Alperen Bolat, Seyyid Hikmet Çelik, Ataberk Olgun, Oguz Ergin, Marco Ottavi:
ERIC: An Efficient and Practical Software Obfuscation Framework. CoRR abs/2207.07407 (2022) - [i13]Ataberk Olgun, F. Nisa Bostanci, Geraldo F. Oliveira, Yahya Can Tugrul, Rahul Bera, Abdullah Giray Yaglikçi, Hasan Hassan, Oguz Ergin, Onur Mutlu:
Sectored DRAM: An Energy-Efficient High-Throughput and Practical Fine-Grained DRAM Architecture. CoRR abs/2207.13795 (2022) - [i12]Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa, Oguz Ergin, Onur Mutlu:
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. CoRR abs/2209.10198 (2022) - [i11]Ataberk Olgun, Hasan Hassan, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Lois Orosa, Haocong Luo, Minesh Patel, Oguz Ergin, Onur Mutlu:
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips. CoRR abs/2211.05838 (2022) - [i10]Ismail Emir Yüksel, Ataberk Olgun, Behzad Salami, F. Nisa Bostanci, Yahya Can Tugrul, Abdullah Giray Yaglikçi, Nika Mansouri-Ghiasi, Onur Mutlu, Oguz Ergin:
TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs. CoRR abs/2211.10894 (2022) - 2021
- [c38]Ataberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo, Jeremie S. Kim, Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin, Onur Mutlu:
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips. ISCA 2021: 944-957 - [i9]Ataberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo, Jeremie S. Kim, Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin, Onur Mutlu:
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips. CoRR abs/2105.08955 (2021) - [i8]Ismail Emir Yüksel, Behzad Salami, Oguz Ergin, Osman Sabri Unsal, Adrián Cristal Kestelman:
MoRS: An Approximate Fault Modelling Framework for Reduced-Voltage SRAMs. CoRR abs/2110.05855 (2021) - [i7]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu:
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM. CoRR abs/2111.00082 (2021) - 2020
- [c37]Behzad Salami, Erhan Baturay Onural, Ismail Emir Yuksel, Fahrettin Koc, Oguz Ergin, Adrián Cristal Kestelman, Osman S. Unsal, Hamid Sarbazi-Azad, Onur Mutlu:
An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration. DSN 2020: 138-149 - [c36]Alperen Bolat, Luca Cassano, Pedro Reviriego, Oguz Ergin, Marco Ottavi:
A Microprocessor Protection Architecture against Hardware Trojans in Memories. DTIS 2020: 1-6 - [i6]Behzad Salami, Erhan Baturay Onural, Ismail Emir Yuksel, Fahrettin Koc, Oguz Ergin, Adrián Cristal Kestelman, Osman S. Unsal, Hamid Sarbazi-Azad, Onur Mutlu:
An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration. CoRR abs/2005.03451 (2020)
2010 – 2019
- 2019
- [c35]Oyku Melikoglu, Oguz Ergin, Behzad Salami, Julian Pavon, Osman S. Unsal, Adrián Cristal:
A Novel FPGA-Based High Throughput Accelerator For Binary Search Trees. HPCS 2019: 612-619 - [i5]Oyku Melikoglu, Oguz Ergin, Behzad Salami, Julian Pavon, Osman S. Unsal, Adrián Cristal:
A Novel FPGA-Based High Throughput Accelerator For Binary Search Trees. CoRR abs/1912.01556 (2019) - 2018
- [j25]Jeremie S. Kim, Damla Senol Cali, Hongyi Xin, Donghyuk Lee, Saugata Ghose, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, Onur Mutlu:
GRIM-Filter: Fast seed location filtering in DNA read mapping using processing-in-memory technologies. BMC Genom. 19(S2) (2018) - [j24]Jorge Martínez, Mert Atamaner, Pedro Reviriego, Oguz Ergin, Marco Ottavi:
Opcode vector: An efficient scheme to detect soft errors in instructions. Microelectron. Reliab. 86: 92-97 (2018) - [i4]Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure. CoRR abs/1805.03195 (2018) - [i3]Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency. CoRR abs/1805.03969 (2018) - 2017
- [j23]Mohammed Alser, Hasan Hassan, Hongyi Xin, Oguz Ergin, Onur Mutlu, Can Alkan:
GateKeeper: a new hardware architecture for accelerating pre-alignment in DNA short read mapping. Bioinform. 33(21): 3355-3363 (2017) - [c34]Mert Atamaner, Oguz Ergin, Marco Ottavi, Pedro Reviriego:
Detecting errors in instructions with bloom filters. DFT 2017: 1-4 - [c33]Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies. HPCA 2017: 241-252 - [i2]Jeremie S. Kim, Damla Senol Cali, Hongyi Xin, Donghyuk Lee, Saugata Ghose, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, Onur Mutlu:
GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies. CoRR abs/1711.01177 (2017) - 2016
- [j22]Abdulaziz Eker, Oguz Ergin:
Exploiting Existing Copies in Register File for Soft Error Correction. IEEE Comput. Archit. Lett. 15(1): 17-20 (2016) - [j21]Abdulaziz Eker, Yakup Murat Mert, Oguz Ergin:
URFA-Update based register file architecture with partial register write for energy efficiency. Microprocess. Microsystems 47: 445-453 (2016) - [c32]Abdulaziz Eker, Oguz Ergin:
Error recovery through partial value similarity. DFT 2016: 103-106 - [c31]Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
ChargeCache: Reducing DRAM latency by exploiting row access locality. HPCA 2016: 581-593 - [i1]Mohammed Alser, Hasan Hassan, Hongyi Xin, Oguz Ergin, Onur Mutlu, Can Alkan:
GateKeeper: Enabling Fast Pre-Alignment in DNA Short Read Mapping with a New Streaming Accelerator Architecture. CoRR abs/1604.01789 (2016) - 2015
- [c30]Begum Egilmez, Gokhan Memik, Seda Ogrenci Memik, Oguz Ergin:
User-specific skin temperature-aware DVFS for smartphones. DATE 2015: 1217-1220 - [c29]Abdulaziz Eker, Oguz Ergin:
Using value similarity of registers for soft error mitigation. DFTS 2015: 91-96 - 2014
- [j20]Yaman Cakmakci, Oguz Ergin:
Exploiting Virtual Addressing for Increasing Reliability. IEEE Comput. Archit. Lett. 13(1): 29-32 (2014) - [j19]Pedro Reviriego, Serdar Zafer Can, Çagri Eryilmaz, Juan Antonio Maestro, Oguz Ergin:
Exploiting processor features to implement error detection in reduced precision matrix multiplications. Microprocess. Microsystems 38(6): 581-584 (2014) - [j18]Serdar Zafer Can, Gulay Yalcin, Oguz Ergin, Osman Sabri Unsal, Adrián Cristal:
Bit Impact Factor: Towards making fair vulnerability comparison. Microprocess. Microsystems 38(6): 598-604 (2014) - [j17]Gulay Yalcin, Oguz Ergin, Emrah Islek, Osman Sabri Unsal, Adrián Cristal:
Exploiting Existing Comparators for Fine-Grained Low-Cost Error Detection. ACM Trans. Archit. Code Optim. 11(3): 32:1-32:24 (2014) - [c28]Gulay Yalcin, Emrah Islek, Oyku Tozlu, Pedro Reviriego, Adrián Cristal, Osman S. Unsal, Oguz Ergin:
Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches. IOLTS 2014: 1-6 - [c27]Mustafa Cavus, Hakki Doganer Sumerkan, Osman Seckin Simsek, Hasan Hassan, Abdullah Giray Yaglikçi, Oguz Ergin:
GPU based Parallel Image Processing Library for Embedded Systems. VISAPP (1) 2014: 234-241 - 2013
- [j16]Burak Karsli, Pedro Reviriego, M. Fatih Balli, Oguz Ergin, Juan Antonio Maestro:
Enhanced Duplication: a Technique to Correct Soft Errors in Narrow Values. IEEE Comput. Archit. Lett. 12(1): 13-16 (2013) - [c26]Fahrettin Koc, Kenan Bozdas, Burak Karsli, Oguz Ergin:
Exploiting replicated checkpoints for soft error detection and correction. DATE 2013: 1494-1497 - [c25]Mehmet Burak Aykenar, Muhammet Ozgur, Osman Seckin Simsek, Oguz Ergin:
Adapting the columns of storage components for lower static energy dissipation. VLSI-SoC 2013: 222-227 - 2012
- [c24]Mehmet Kayaalp, Fahrettin Koc, Oguz Ergin:
Improving the Soft Error Resilience of the Register Files Using SRAM Bitcells with Built-In Comparators. DSD 2012: 140-143 - [c23]Mehmet Kayaalp, Fahrettin Koc, Oguz Ergin:
Exploiting Bus Level and Bit Level Inactivity for Preventing Wire Degradation due to Electromigration. DSD 2012: 280-287 - 2011
- [c22]Fahrettin Koc, Osman Seckin Simsek, Oguz Ergin:
Using content-aware bitcells to reduce static energy dissipation. ICCD 2011: 51-56 - [c21]Mehmet Burak Aykenar, Muhammet Ozgur, Vehbi Esref Bayraktar, Oguz Ergin:
Tag simplification: Achieving power efficiency through reducing the complexity of the wakeup logic. ICEAC 2011: 1-6 - 2010
- [j15]Ilknur Cansu Kaynak, Yusuf Onur Koçberber, Oguz Ergin:
Reducing the Energy Dissipation of the Issue Queue by Exploiting Narrow Immediate Operands. J. Circuits Syst. Comput. 19(8): 1689-1709 (2010) - [c20]Görkem Asilioglu, Emine Merve Kaya, Oguz Ergin:
Complexity-Effective Rename Table Design for Rapid Speculation Recovery. ARCS 2010: 15-24 - [c19]Mehmet Kayaalp, Oguz Ergin, Osman S. Ünsal, Mateo Valero:
Exploiting Inactive Rename Slots for Detecting Soft Errors. ARCS 2010: 126-137 - [c18]Meltem Ozsoy, Yusuf Onur Koçberber, Mehmet Kayaalp, Oguz Ergin:
Dynamic register file partitioning in superscalar microprocessors for energy efficiency. ICCD 2010: 515-520
2000 – 2009
- 2009
- [j14]Yusuf Osmanlioglu, Y. Sinan Hanay, Oguz Ergin:
Modifying the Data-Holding Components of the Microprocessors for Energy Efficiency. J. Circuits Syst. Comput. 18(6): 1093-1117 (2009) - [j13]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Exploring the limits of early register release: Exploiting compiler analysis. ACM Trans. Archit. Code Optim. 6(3): 12:1-12:30 (2009) - [j12]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Energy-efficient register caching with compiler assistance. ACM Trans. Archit. Code Optim. 6(4): 13:1-13:23 (2009) - [j11]Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González:
Reducing Soft Errors through Operand Width Aware Policies. IEEE Trans. Dependable Secur. Comput. 6(3): 217-230 (2009) - [c17]Yusuf Osmanlioglu, Yusuf Onur Koçberber, Oguz Ergin:
Reducing parity generation latency through input value aware circuits. ACM Great Lakes Symposium on VLSI 2009: 109-112 - 2008
- [j10]Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González, James W. Tschanz:
Refueling: Preventing Wire Degradation due to Electromigration. IEEE Micro 28(6): 37-46 (2008) - 2007
- [j9]Gulay Yalcin, Oguz Ergin:
Using Tag-Match Comparators for Detecting Soft Errors. IEEE Comput. Archit. Lett. 6(2): 53-56 (2007) - [c16]Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González:
Fuse: A Technique to Anticipate Failures due to Degradation in ALUs. IOLTS 2007: 15-22 - 2006
- [j8]Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González:
Exploiting Narrow Values for Soft Error Tolerance. IEEE Comput. Archit. Lett. 5(2) (2006) - [j7]Osman S. Unsal, James W. Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin:
Impact of Parameter Variations on Circuits and Microarchitecture. IEEE Micro 26(6): 30-39 (2006) - [j6]Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin:
Instruction packing: Toward fast and energy-efficient instruction scheduling. ACM Trans. Archit. Code Optim. 3(2): 156-181 (2006) - [j5]Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose:
Early Register Deallocation Mechanisms Using Checkpointed Register Files. IEEE Trans. Computers 55(9): 1153-1166 (2006) - [c15]Osman S. Unsal, Oguz Ergin, Xavier Vera, Antonio González:
Empowering a helper cluster through data-width aware instruction selection policies. IPDPS 2006 - [c14]Oguz Ergin:
Exploiting Narrow Values for Energy Efficiency in the Register Files of Superscalar Microprocessors. PATMOS 2006: 477-485 - 2005
- [c13]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Compiler Directed Early Register Release. IEEE PACT 2005: 110-122 - [c12]Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin:
Power-Efficient Wakeup Tag Broadcast. ICCD 2005: 654-661 - [c11]Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin:
Instruction packing: reducing power and delay of the dynamic scheduling logic. ISLPED 2005: 30-35 - 2004
- [j4]Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose:
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. IEEE Trans. Computers 53(6): 653-665 (2004) - [j3]Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Isolating Short-Lived Operands for Energy Reduction. IEEE Trans. Computers 53(6): 697-709 (2004) - [j2]Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Energy Efficient Comparators for Superscalar Datapaths. IEEE Trans. Computers 53(7): 892-904 (2004) - [c10]Aneesh Aggarwal, Manoj Franklin, Oguz Ergin:
Defining Wakeup Width for Efficient Dynamic Scheduling. ICCD 2004: 36-41 - [c9]Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kanad Ghose:
Increasing Processor Performance Through Early Register Release. ICCD 2004: 480-487 - [c8]Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry V. Ponomarev:
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. MICRO 2004: 304-315 - [c7]Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin:
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. PACS 2004: 15-29 - 2003
- [j1]Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, Peter M. Kogge:
Energy-efficient issue queue design. IEEE Trans. Very Large Scale Integr. Syst. 11(5): 789-800 (2003) - [c6]Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Reducing Datapath Energy through the Isolation of Short-Lived Operands. IEEE PACT 2003: 258-268 - [c5]Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose:
Distributed Reorder Buffer Schemes for Low Power. ICCD 2003: 364-370 - [c4]Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose:
Reducing reorder buffer complexity through selective operand caching. ISLPED 2003: 235-240 - [c3]Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Power efficient comparators for long arguments in superscalar processors. ISLPED 2003: 378-383 - [c2]Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose:
Energy Efficient Register Renaming. PATMOS 2003: 219-228 - 2002
- [c1]Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev:
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. ICCD 2002: 118-121
Coauthor Index
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