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2010 – 2019
- 2018
[c17]Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Niall Timlin-Canning, Krzysztof Kepa
, Seamus Cawley, Ian Gallivan, László Bakó, Frank Callaly:
Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC. RSP 2018: 76-82- 2015
- [c16]Krzysztof Kepa, Ritesh Soni, Peter M. Athanas:
Inferring custom architectures from OpenCL. PATMOS 2015: 9-16 - 2014
- [j3]Pawel Weber, Maciej Zagrabski, Bartosz Wojciechowski, Maciej Nikodem, Krzysztof Kepa, Krzysztof S. Berezowski:
Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devices. Microelectron. J. 45(12): 1753-1763 (2014) - [c15]Vignesh Adhinarayanan, Thaddeus Koehn, Krzysztof Kepa, Wu-chun Feng, Peter Athanas:
On the performance and energy efficiency of FPGAs and GPUs for polyphase channelization. ReConFig 2014: 1-7 - [c14]David Uliana, Peter M. Athanas, Krzysztof Kepa:
FPGA-based accelerator development for non-engineers. ReConFig 2014: 1-6 - 2013
- [c13]Kavya Shagrithaya, Krzysztof Kepa, Peter Athanas:
Enabling development of OpenCL applications on FPGA platforms. ASAP 2013: 26-30 - [c12]David Uliana, Krzysztof Kepa, Peter Athanas:
FPGA-based HPC application design for non-experts. ASAP 2013: 261-264 - [c11]David Uliana, Krzysztof Kepa, Peter Athanas:
FPGA-based HPC application design for non-experts (abstract only). FPGA 2013: 274 - [c10]David Uliana, Krzysztof Kepa, Peter Athanas:
FPGA-based HPC application design for non-experts. RSP 2013: 9-15 - 2011
- [c9]Krzysztof Kepa, Fearghal Morgan, Peter Athanas:
ERDB: An Embedded Routing Database for Reconfigurable Systems. FPL 2011: 195-200 - [c8]Fearghal Morgan, Seamus Cawley, Frank Callaly, Shane Agnew, Patrick Rocke, Martin O'Halloran, Nina Drozd, Krzysztof Kepa, Brian McGinley:
Remote FPGA Lab with Interactive Control and Visualisation Interface. FPL 2011: 496-499 - [c7]Taras Iakymchuk, Maciej Nikodem, Krzysztof Kepa:
Temperature-based covert channel in FPGA systems. ReCoSoC 2011: 1-7 - 2010
- [j2]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz:
SeReCon: a secure reconfiguration controller for self-reconfigurable systems. Int. J. Crit. Comput. Based Syst. 1(1/2/3): 86-103 (2010) - [j1]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker:
Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems. ACM Trans. Reconfigurable Technol. Syst. 4(1): 4:1-4:26 (2010)
2000 – 2009
- 2009
- [c6]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker:
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. ARC 2009: 62-73 - [c5]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz:
IP protection in Partially Reconfigurable FPGAs. FPL 2009: 403-409 - 2008
- [c4]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz:
SeReCon: A Trusted Environment for SoPC Design. DepCoS-RELCOMEX 2008: 332-338 - [c3]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz:
SeReCon: A Secure Dynamic Partial Reconfiguration Controller. ISVLSI 2008: 292-297 - 2007
- [c2]Krzysztof Kosciuszkiewicz, Fearghal Morgan, Krzysztof Kepa:
Run-Time Management of Reconfigurable Hardware Tasks Using Embedded Linux. FPT 2007: 209-215 - 2006
- [c1]Krzysztof Kosciuszkiewicz, Krzysztof Kepa, Fearghal Morgan:
Transparent Management of Reconfigurable Hardware in Embedded Operating Systems. ISVLSI 2006: 432-433
Coauthor Index
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