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ORCIDPablo Abad Fidalgo
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- affiliation: University of Cantabria, Spain
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2020 – today
- 2023
[c11]Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio
, Valentin Puente:
Performance Characterization of Popular DNN Models on Out-of-Order CPUs. PACT 2023: 199-210- 2022
- [c10]Alvaro Saiz, Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente:
Top-Down Performance Profiling on NVIDIA's GPUs. IPDPS 2022: 179-189 - 2021
- [j8]Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente:
Fast, Accurate Processor Evaluation Through Heterogeneous, Sample-Based Benchmarking. IEEE Trans. Parallel Distributed Syst. 32(12): 2983-2995 (2021) - 2020
- [c9]Pablo Prieto, Pablo Abad Fidalgo, Jose Angel Herrero, José-Ángel Gregorio, Valentin Puente:
SPECcast: A Methodology for Fast Performance Evaluation with SPEC CPU 2017 Multiprogrammed Workloads. ICPP 2020: 54:1-54:11
2010 – 2019
- 2019
- [c8]Adrian Colaso, Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente:
Architecting Racetrack Memory Preshift through Pattern-Based Prediction Mechanisms. IPDPS 2019: 273-282 - [i1]Adrian Colaso, Pablo Prieto, Jose Angel Herrero, Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio:
Accuracy vs. Computational Cost Tradeoff in Distributed Computer System Simulation. CoRR abs/1902.02837 (2019) - 2018
- [j7]Lucia G. Menezo, Valentin Puente, Pablo Abad Fidalgo, José-Ángel Gregorio:
Mosaic: A Scalable Coherence Protocol. Int. J. Parallel Program. 46(6): 1110-1138 (2018) - [j6]Adrian Colaso, Pablo Prieto, Jose Angel Herrero, Pablo Abad Fidalgo, Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio:
Memory Hierarchy Characterization of NoSQL Applications through Full-System Simulation. IEEE Trans. Parallel Distributed Syst. 29(5): 1161-1173 (2018) - 2016
- [j5]Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio:
AC-WAR: Architecting the Cache Hierarchy to Improve the Lifetime of a Non-Volatile Endurance-Limited Main Memory. IEEE Trans. Parallel Distributed Syst. 27(1): 66-77 (2016) - 2015
- [j4]Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio:
Improving last level shared cache performance through mobile insertion policies (MIP). Parallel Comput. 49: 13-27 (2015) - 2013
- [j3]Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio:
LIGERO: A light but efficient router conceived for cache-coherent chip multiprocessors. ACM Trans. Archit. Code Optim. 9(4): 37:1-37:21 (2013) - [c7]Pablo Abad Fidalgo, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, José-Ángel Gregorio:
Interaction of NoC Design and Coherence Protocol in 3D-Stacked CMPs. DSD 2013: 48-55 - 2012
- [j2]Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio:
Balancing Performance and Cost in CMP Interconnection Networks. IEEE Trans. Parallel Distributed Syst. 23(3): 452-459 (2012) - [j1]Pablo Abad Fidalgo, Valentin Puente, Lucia G. Menezo, José-Ángel Gregorio:
Adaptive-Tree Multicast: Efficient Multidestination Support for CMP Communication Substrate. IEEE Trans. Parallel Distributed Syst. 23(11): 2010-2023 (2012) - [c6]Lucia G. Menezo, Valentin Puente, Pablo Abad Fidalgo, José-Ángel Gregorio:
Improving coherence protocol reactiveness by trading bandwidth for latency. Conf. Computing Frontiers 2012: 143-152 - [c5]Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio:
BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip. ICCD 2012: 55-60 - [c4]Pablo Abad Fidalgo, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, José-Ángel Gregorio:
TOPAZ: An Open-Source Interconnection Network Simulator for Chip Multiprocessors and Supercomputers. NOCS 2012: 99-106
2000 – 2009
- 2009
- [c3]Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio:
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks. HPCA 2009: 355-366 - 2008
- [c2]Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio:
Reducing the Interconnection Network Cost of Chip Multiprocessors. NOCS 2008: 183-192 - 2007
- [c1]Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio, Pablo Prieto:
Rotary router: an efficient architecture for CMP interconnection networks. ISCA 2007: 116-125
Coauthor Index
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