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ORCIDJaijeet S. Roychowdhury
Jaijeet Roychowdhury
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- affiliation: The University of California, Berkeley, CA, USA
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2020 – today
- 2024
[c105]Shreesha Sreedhara
, Jaijeet Roychowdhury:
A Novel Oscillator Ising Machine Coupling Scheme for High-Quality Optimization. UCNC 2024: 203-218- [c104]Venkata Pavan Sumanth Sikhakollu, Shreesha Sreedhara, Rajit Manohar, Alan Mishchenko, Jaijeet Roychowdhury:
High Quality Circuit-Based 3-SAT Mappings for Oscillator Ising Machines. UCNC 2024: 269-285 - 2023
- [c103]Shreesha Sreedhara, Jaijeet Roychowdhury, Joachim Wabnig, K. Pavan Srinath:
Digital Emulation of Oscillator Ising Machines. DATE 2023: 1-2 - [c102]Shreesha Sreedhara, Jaijeet Roychowdhury, Joachim Wabnig, Pavan Koteshwar Srinath:
MU-MIMO Detection Using Oscillator Ising Machines. ICCAD 2023: 1-9 - [i6]Thomas Jagielski, Rajit Manohar, Jaijeet Roychowdhury:
FPIM: Field-Programmable Ising Machines for Solving SAT. CoRR abs/2306.01569 (2023) - 2022
- [c101]Naomi Sagan, Jaijeet Roychowdhury:
Transient Adjoint DAE Sensitivities: a Complete, Rigorous, and Numerically Accurate Formulation. ASP-DAC 2022: 513-518 - [c100]Naomi Sagan, Jaijeet Roychowdhury:
DaS: Implementing Dense Ising Machines Using Sparse Resistive Networks. ICCAD 2022: 148:1-148:9 - 2021
- [j17]Tianshi Wang, Leon Wu, Parth Nobel, Jaijeet Roychowdhury:
Solving combinatorial optimisation problems using oscillator based Ising machines. Nat. Comput. 20(2): 287-306 (2021) - [c99]Jaijeet Roychowdhury:
Bistable Latch Ising Machines. UCNC 2021: 131-148
2010 – 2019
- 2019
- [c98]Tianshi Wang, Leon Wu, Jaijeet Roychowdhury:
New Computational Results and Hardware Prototypes for Oscillator-based Ising Machines. DAC 2019: 239 - [c97]Tianshi Wang, Jaijeet Roychowdhury:
OIM: Oscillator-Based Ising Machines for Solving Combinatorial Optimisation Problems. UCNC 2019: 232-256 - [i5]Tianshi Wang, Jaijeet Roychowdhury:
OIM: Oscillator-based Ising Machines for Solving Combinatorial Optimisation Problems. CoRR abs/1903.07163 (2019) - [i4]Tianshi Wang, Leon Wu, Jaijeet Roychowdhury:
Late Breaking Results: New Computational Results and Hardware Prototypes for Oscillator-based Ising Machines. CoRR abs/1904.10211 (2019) - 2017
- [c96]Archit Gupta, Tianshi Wang, Ahmet Mahmutoglu Gokcen, Jaijeet Roychowdhury:
STEAM: Spline-based tables for efficient and accurate device modelling. ASP-DAC 2017: 463-468 - [i3]Tianshi Wang, Jaijeet Roychowdhury:
Oscillator-based Ising Machine. CoRR abs/1709.08102 (2017) - 2016
- [i2]Tianshi Wang, Jaijeet S. Roychowdhury:
Well-Posed Models of Memristive Devices. CoRR abs/1605.04897 (2016) - 2015
- [j16]Jaijeet Roychowdhury:
Boolean Computation Using Self-Sustaining Nonlinear Oscillators. Proc. IEEE 103(11): 1958-1969 (2015) - [c95]Aadithya V. Karthik, Sayak Ray, Jaijeet Roychowdhury:
BEE: Predicting realistic worst case and stochastic eye diagrams by accounting for correlated bitstreams and coding strategies. ASP-DAC 2015: 366-371 - [c94]Tianshi Wang, Aadithya V. Karthik, Bichen Wu, Jian Yao, Jaijeet Roychowdhury:
MAPP: The Berkeley Model and Algorithm Prototyping Platform. CICC 2015: 1-8 - [c93]Tianshi Wang, Jaijeet Roychowdhury:
Design tools for oscillator-based computing systems. DAC 2015: 188:1-188:6 - [c92]Tianshi Wang, Aadithya V. Karthik, Bichen Wu, Jaijeet Roychowdhury:
Poster: MAPP: The Berkeley Model and Algorithm Prototyping Platform. ICSE (2) 2015: 825-826 - 2014
- [c91]Aadithya V. Karthik, Sayak Ray, Pierluigi Nuzzo, Alan Mishchenko, Robert K. Brayton, Jaijeet Roychowdhury:
ABCD-NL: Approximating Continuous non-linear dynamical systems using purely Boolean models for analog/mixed-signal verification. ASP-DAC 2014: 250-255 - [c90]Aadithya V. Karthik, David Soloveichik, Sayak Ray, Baruch Sterin, Alan Mishchenko, Robert K. Brayton, Jaijeet Roychowdhury:
NINJA: boolean modelling and formal verification of tiered-rate chemical reaction networks (extended abstract). BCB 2014: 623-624 - [c89]Bichen Wu, Jaijeet Roychowdhury:
Efficient per-element distortion contribution analysis via Harmonic Balance adjoints. CICC 2014: 1-4 - [c88]Jian Yao, Tianshi Wang, Jaijeet Roychowdhury:
An efficient time step control method in transient simulation for DAE system. ICECS 2014: 44-47 - [c87]Tianshi Wang, Jaijeet Roychowdhury:
PHLOGON: PHase-based LOGic using Oscillatory Nano-systems. UCNC 2014: 353-366 - [i1]Jaijeet Roychowdhury:
Boolean Computation Using Self-Sustaining Nonlinear Oscillators. CoRR abs/1410.5016 (2014) - 2013
- [j15]Aadithya V. Karthik, Alper Demir, Sriramkumar Venugopalan, Jaijeet S. Roychowdhury:
Accurate Prediction of Random Telegraph Noise Effects in SRAMs and DRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(1): 73-86 (2013) - [c86]Aadithya V. Karthik, Jaijeet S. Roychowdhury:
ABCD-L: approximating continuous linear systems using boolean models. DAC 2013: 63:1-63:9 - [c85]Ahmet Gokcen Mahmutoglu, Alper Demir, Jaijeet S. Roychowdhury:
Modeling and analysis of (nonstationary) low frequency noise in nano devices: a synergistic approach based on stochastic chemical kinetics. ICCAD 2013: 500-507 - 2012
- [c84]Arie Meir, Jaijeet S. Roychowdhury:
BLAST: efficient computation of nonlinear delay sensitivities in electronic and biological networks using barycentric Lagrange enabled transient adjoint analysis. DAC 2012: 301-310 - [c83]Aadithya V. Karthik, Jaijeet S. Roychowdhury:
DAE2FSM: automatic generation of accurate discrete-time logical abstractions for continuous-time circuit dynamics. DAC 2012: 311-316 - [c82]Arkosnato Neogy, Jaijeet S. Roychowdhury:
Analysis and design of sub-harmonically injection locked oscillators. DATE 2012: 1209-1214 - [c81]Aadithya V. Karthik, Yingyan Lin, Chenjie Gu, Aolin Xu, Jaijeet S. Roychowdhury, Naresh R. Shanbhag:
A fully automated technique for constructing FSM abstractions of non-ideal latches in communication systems. ICASSP 2012: 5289-5292 - 2011
- [c80]Chenjie Gu, Jaijeet S. Roychowdhury:
FSM model abstraction for analog/mixed-signal circuits by learning from I/O trajectories. ASP-DAC 2011: 7-12 - [c79]Aadithya V. Karthik, Sriramkumar Venugopalan, Alper Demir, Jaijeet S. Roychowdhury:
MUSTARD: a coupled, stochastic/deterministic, discrete/continuous technique for predicting the impact of random telegraph noise on SRAMs and DRAMs. DAC 2011: 292-297 - [c78]Aadithya V. Karthik, Alper Demir, Sriramkumar Venugopalan, Jaijeet S. Roychowdhury:
SAMURAI: An accurate method for modelling and simulating non-stationary Random Telegraph Noise in SRAMs. DATE 2011: 1113-1118 - [c77]David Amsallem, Jaijeet S. Roychowdhury:
ModSpec: An open, flexible specification framework for multi-domain device modelling. ICCAD 2011: 367-374 - 2010
- [c76]Chenjie Gu, Jaijeet S. Roychowdhury:
Manifold construction and parameterization for nonlinear manifold-based model reduction. ASP-DAC 2010: 205-210 - [c75]Chenjie Gu, Jaijeet S. Roychowdhury:
Generalized nonlinear timing/phase macromodeling: Theory, numerical methods and applications. ICCAD 2010: 284-291 - [c74]Alper Demir, Chenjie Gu, Jaijeet S. Roychowdhury:
Phase equations for quasi-periodic oscillators. ICCAD 2010: 292-297
2000 – 2009
- 2009
- [j14]Jaijeet S. Roychowdhury:
Numerical Simulation and Modelling of Electronic and Biochemical Systems. Found. Trends Electron. Des. Autom. 3(2-3): 97-303 (2009) - [c73]Prateek Bhansali, Jaijeet S. Roychowdhury:
Gen-Adler: the Generalized Adler's equation for injection locking analysis in oscillators. ASP-DAC 2009: 522-527 - [e2]Jaijeet S. Roychowdhury:
2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009. ACM 2009, ISBN 978-1-60558-800-1 [contents] - 2008
- [j13]Naresh R. Shanbhag, Subhasish Mitra, Gustavo de Veciana, Michael Orshansky, Radu Marculescu, Jaijeet S. Roychowdhury, Douglas L. Jones, Jan M. Rabaey:
The Search for Alternative Computational Paradigms. IEEE Des. Test Comput. 25(4): 334-343 (2008) - [j12]Ting Mei, Jaijeet S. Roychowdhury:
A Time-Domain Oscillator Envelope Tracking Algorithm Employing Dual Phase Conditions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1): 59-69 (2008) - [j11]Ning Dong, Jaijeet S. Roychowdhury:
General-Purpose Nonlinear Model-Order Reduction Using Piecewise-Polynomial Representations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 249-264 (2008) - [j10]Shweta Srivastava, Jaijeet S. Roychowdhury:
Independent and Interdependent Latch Setup/Hold Time Characterization via Newton-Raphson Solution and Euler Curve Tracking of State-Transition Equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(5): 817-830 (2008) - [c72]Chenjie Gu, Jaijeet S. Roychowdhury:
An efficient, fully nonlinear, variability-aware non-monte-carlo yield estimation procedure with applications to SRAM cells and ring oscillators. ASP-DAC 2008: 754-761 - [c71]David M. Binkley, Helmut E. Graeb, Georges G. E. Gielen, Jaijeet S. Roychowdhury:
From Transistor to PLL - Analogue Design and EDA Methods. DATE 2008 - [c70]Chenjie Gu, Jaijeet S. Roychowdhury:
Model reduction via projection onto nonlinear manifolds, with applications to analog circuits and biochemical systems. ICCAD 2008: 85-92 - [c69]Prateek Bhansali, Shweta Srivastava, Xiaolue Lai, Jaijeet S. Roychowdhury:
Comprehensive procedure for fast and accurate coupled oscillator network simulation. ICCAD 2008: 815-820 - [c68]Shatam Agarwal, Jaijeet S. Roychowdhury:
Efficient Multiscale Simulations of Circadian Rhythms Using Automated Phase Macomodelling Techniques. Pacific Symposium on Biocomputing 2008: 402-413 - [e1]Sani R. Nassif, Jaijeet S. Roychowdhury:
2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008. IEEE Computer Society 2008, ISBN 978-1-4244-2820-5 [contents] - 2007
- [j9]Rob A. Rutenbar, Georges G. E. Gielen, Jaijeet S. Roychowdhury:
Hierarchical Modeling, Optimization, and Synthesis for System-Level Analog and RF Designs. Proc. IEEE 95(3): 640-669 (2007) - [j8]Ting Mei, Jaijeet S. Roychowdhury:
Small-Signal Analysis of Oscillators Using Generalized Multitime Partial Differential Equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6): 1054-1069 (2007) - [j7]Shweta Srivastava, Jaijeet S. Roychowdhury:
Analytical Equations for Nonlinear Phase Errors and Jitter in Ring Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(10): 2321-2329 (2007) - [c67]S. Dabas, Ning Dong, Jaijeet S. Roychowdhury:
Automated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods. ASP-DAC 2007: 361-366 - [c66]Xiaolue Lai, Jaijeet S. Roychowdhury:
Advanced tools for simulation and design of oscillators/PLLs. ASP-DAC 2007: 442-449 - [c65]Shweta Srivastava, Jaijeet S. Roychowdhury:
Rapid Estimation of the Probability of SRAM Failure due to MOS Threshold Variations. CICC 2007: 229-232 - [c64]Zhichun Wang, Jaijeet S. Roychowdhury:
Obtaining Frequency Sensitivities to Variations Analytically from Parameterized Nonlinear Oscillator Phase Macromodels. CICC 2007: 611-614 - [c63]Shweta Srivastava, Jaijeet S. Roychowdhury:
Interdependent Latch Setup/Hold Time Characterization via Euler-Newton Curve Tracing on State-Transition Equations. DAC 2007: 136-141 - [c62]Zhichun Wang, Xiaolue Lai, Jaijeet S. Roychowdhury:
PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels. DAC 2007: 142-147 - [c61]Jaijeet S. Roychowdhury:
Micro-Photonic Interconnects: Characteristics, Possibilities and Limitations. DAC 2007: 574-575 - [c60]Shweta Srivastava, Jaijeet S. Roychowdhury:
Rapid and accurate latch characterization via direct Newton solution of setup/hold times. DATE 2007: 1006-1011 - 2006
- [j6]Jaijeet S. Roychowdhury, Robert C. Melville:
Delivering global DC convergence for large mixed-signal circuits via homotopy/continuation methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 66-78 (2006) - [c59]Xiaolue Lai, Jaijeet S. Roychowdhury:
Fast simulation of large networks of nanotechnological and biochemical oscillators for investigating self-organization phenomena. ASP-DAC 2006: 273-278 - [c58]Prashant Goyal, Xiaolue Lai, Jaijeet S. Roychowdhury:
A fast methodology for first-time-correct design of PLLs using nonlinear phase-domain VCO macromodels. ASP-DAC 2006: 291-296 - [c57]Xiaolue Lai, Jaijeet S. Roychowdhury:
Macromodelling oscillators using Krylov-subspace methods. ASP-DAC 2006: 527-532 - [c56]Shweta Srivastava, Xiaolue Lai, Jaijeet S. Roychowdhury:
Nonlinear Phase Macromodel Based Simulation/Design of PLLs with Superharmonically Locked Dividers. CICC 2006: 349-352 - [c55]Ting Mei, Jaijeet S. Roychowdhury:
Rigorous Analytical/Graphical Injection Locking Analysis of Two-Port Negative Resistance Oscillators. CICC 2006: 741-744 - [c54]Xiaolue Lai, Jaijeet S. Roychowdhury:
A multilevel technique for robust and efficient extraction of phase macromodels of digitally controlled oscillators. DAC 2006: 1017-1022 - [c53]Ting Mei, Jaijeet S. Roychowdhury:
A robust envelope following method applicable to both non-autonomous and oscillatory circuits. DAC 2006: 1029-1034 - [c52]Ting Mei, Jaijeet S. Roychowdhury:
Efficient AC analysis of oscillators using least-squares methods. DATE 2006: 263-268 - [c51]Xiaolue Lai, Jaijeet S. Roychowdhury:
TP-PPV: piecewise nonlinear, time-shifted oscillator macromodel extraction for fast, accurate PLL simulation. ICCAD 2006: 269-274 - [c50]Ting Mei, Jaijeet S. Roychowdhury:
PPV-HB: harmonic balance for oscillator/PLL phase macromodels. ICCAD 2006: 283-288 - 2005
- [j5]Zhe Wang, Rajeev Murgai, Jaijeet S. Roychowdhury:
ADAMIN: automated, accurate macromodeling of digital aggressors for power and ground supply noise prediction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1): 56-64 (2005) - [j4]Ting Mei, Jaijeet S. Roychowdhury, Todd S. Coffey, Scott A. Hutchinson, David M. Day:
Robust, stable time-domain methods for solving MPDEs of fast/slow systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(2): 226-239 (2005) - [c49]Xiaolue Lai, Yayun Wan, Jaijeet S. Roychowdhury:
Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noise. ASP-DAC 2005: 459-464 - [c48]Xiaolue Lai, Jaijeet Roychowdhury:
oder: http: //potol.eecs.berkeley.edu/~jr Analytical equations for predicting injection locking in LC and ring oscillators. CICC 2005: 461-464 - [c47]Yayun Wan, Xiaolue Lai, Jaijeet S. Roychowdhury:
Understanding injection locking in negative-resistance LC oscillators intuitively using nonlinear feedback analysis. CICC 2005: 729-732 - [c46]Ning Dong, Jaijeet S. Roychowdhury:
Automated nonlinear Macromodelling of output buffers for high-speed digital applications. DAC 2005: 51-56 - [c45]Yayun Wan, Jaijeet S. Roychowdhury:
Operator-based model-order reduction of linear periodically time-varying systems. DAC 2005: 391-396 - [c44]Ting Mei, Jaijeet S. Roychowdhury:
An efficient and robust technique for tracking amplitude and frequency envelopes in oscillators. ICCAD 2005: 599-603 - [c43]Ting Mei, Jaijeet S. Roychowdhury:
Oscillator-AC: restoring rigour to linearized small-signal analysis of oscillators. ICCAD 2005: 604-609 - [c42]Kapil D. Boianapally, Ting Mei, Jaijeet S. Roychowdhury:
A multi-harmonic probe technique for computing oscillator steady states. ICCAD 2005: 610-613 - [c41]Sachin S. Sapatnekar, Jaijeet S. Roychowdhury, Ramesh Harjani:
High-Speed Interconnect Technology: On-Chip and Off-Chip. VLSI Design 2005: 7 - [c40]Jaijeet S. Roychowdhury:
Exact Analytical Equations for Predicting Nonlinear Phase Errors and Jitter in Ring Oscillators. VLSI Design 2005: 516-521 - 2004
- [c39]Praveen Ghanta, Zheng Li, Jaijeet S. Roychowdhury:
Analytical expressions for phase noise eigenfunctions of LC oscillators. ASP-DAC 2004: 175-180 - [c38]Jaijeet Roychowdhury:
An overview of automated macromodelling techniques for mixed-signal systems. CICC 2004: 109-116 - [c37]Ning Dong, Jaijeet Roychowdhury:
Automated extraction of broadly applicable nonlinear analog macromodels from SPICE-level descriptions. CICC 2004: 117-120 - [c36]Xiaolue Lai, Jaijeet Roychowdhury:
Fast, accurate prediction of PLL jitter induced by power grid noise. CICC 2004: 121-124 - [c35]Ting Mei, Jaijeet S. Roychowdhury, Todd S. Coffey, Scott A. Hutchinson, David M. Day:
Robust, stable time-domain methods for solving MPDEs of fast/slow systems. DAC 2004: 848-853 - [c34]Zhe Wang, Rajeev Murgai, Jaijeet S. Roychowdhury:
Automated, Accurate Macromodelling of Digital Aggressors for Power/Ground/Substrate Noise Prediction. DATE 2004: 824-829 - [c33]Xiaolue Lai, Jaijeet S. Roychowdhury:
Automated oscillator macromodelling techniques for capturing amplitude variations and injection locking. ICCAD 2004: 687-694 - [c32]Zhe Wang, Rajeev Murgai, Jaijeet S. Roychowdhury:
Macromodeling of digital libraries for substrate noise analysis. ISCAS (5) 2004: 516-519 - [c31]Jaijeet S. Roychowdhury:
Algorithmic Macromodelling Methods for Mixed-Signal Systems. VLSI Design 2004: 141- - 2003
- [j3]Alper Demir, Jaijeet S. Roychowdhury:
A reliable and efficient procedure for oscillator PPV computation, with phase noise macromodeling applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(2): 188-197 (2003) - [c30]Ning Dong, Jaijeet S. Roychowdhury:
Piecewise polynomial nonlinear model reduction. DAC 2003: 484-489 - 2002
- [c29]Jaijeet S. Roychowdhury:
A time-domain RF steady-state method for closely spaced tones. DAC 2002: 510-513 - [c28]Jaijeet S. Roychowdhury:
Making Fourier-envelope simulation robust. ICCAD 2002: 240-245 - [c27]Jaijeet S. Roychowdhury:
Theory and algorithms for RF sensitivity computation. ISCAS (5) 2002: 225-228 - [c26]Jaijeet S. Roychowdhury:
Optical Systems 101 for EDA Practitioners. IWLS 2002: 397 - 2001
- [c25]Piet Wambacq, Gerd Vandersteen, Joel R. Phillips, Jaijeet S. Roychowdhury, Wolfgang Eberle, Baolin Yang, David E. Long, Alper Demir:
CAD for RF circuits. DATE 2001: 520-529 - [c24]Alper Demir, David E. Long, Jaijeet S. Roychowdhury:
Computing Phase Noise Eigenfunctions Directly from Harmonic Balance/Shooting Matrices. VLSI Design 2001: 283- - 2000
- [c23]Alper Demir, David E. Long, Jaijeet S. Roychowdhury:
Computing Phase Noise Eigenfunctions Directly from Steady-State Jacobian Matrices. ICCAD 2000: 283-288 - [c22]Laurence Nagel, Jaijeet S. Roychowdhury:
Computer-aided Design of RF Communication Systems: Techniques and Challenges. VLSI Design 2000: 6
1990 – 1999
- 1999
- [c21]Jaijeet S. Roychowdhury:
Reduced-Order Modelling of Time-Varying Systems. ASP-DAC 1999: 53-56 - [c20]Onuttom Narayan, Jaijeet S. Roychowdhury:
Analysing Forced Oscillators with Multiple Time Scales. ASP-DAC 1999: 57-60 - [c19]Jaijeet Roychowdhury:
Automated macromodelling of "nonlinear" wireless blocks. CICC 1999: 17-20 - [c18]Alper Demir, Jaijeet Roychowdhury:
Modeling and simulation of noise in analog/mixed-signal communication systems. CICC 1999: 385-393 - [c17]Onuttom Narayan, Jaijeet S. Roychowdhury:
Multi-Time Simulation of Voltage-Controlled Oscillators. DAC 1999: 629-634 - [c16]Onuttom Narayan, Jaijeet S. Roychowdhury:
Analyzing Forced Oscillators with Multiple Time Scales. VLSI Design 1999: 621- - 1998
- [j2]Jaijeet Roychowdhury, David E. Long, Peter Feldmann:
Cyclostationary noise analysis of large RF circuits with multitone excitations. IEEE J. Solid State Circuits 33(3): 324-336 (1998) - [c15]Alper Demir, Amit Mehrotra, Jaijeet Roychowdhury:
Phase noise and timing jitter in oscillators. CICC 1998: 45-48 - [c14]Jaijeet Roychowdhury:
MPDE methods for efficient analysis of wireless systems. CICC 1998: 451-454 - [c13]Alper Demir, Amit Mehrotra, Jaijeet S. Roychowdhury:
Phase Noise in Oscillators: A Unifying Theory and Numerical Methods for Characterisation. DAC 1998: 26-31 - [c12]Al Dunlop, Alper Demir, Peter Feldmann, Sharad Kapur, David E. Long, Robert C. Melville, Jaijeet S. Roychowdhury:
Tools and Methodology for RF IC Design. DAC 1998: 414-420 - [c11]Jaijeet S. Roychowdhury:
Reduced-order modelling of linear time-varying systems. ICCAD 1998: 92-95 - [c10]Jaijeet S. Roychowdhury, Alper Demir:
Estimating noise in RF systems. ICCAD 1998: 199-202 - 1997
- [c9]Jaijeet S. Roychowdhury, Peter Feldmann:
A new linear-time harmonic balance algorithm for cyclostationary noise analysis in RF circuits. ASP-DAC 1997: 483-492 - [c8]Jaijeet S. Roychowdhury:
Efficient Methods for Simulating Highly Nonlinear Multi-Rate Circuits. DAC 1997: 269-274 - 1996
- [c7]Jaijeet S. Roychowdhury, Robert C. Melville:
Homotopy Techniques for Obtaining a DC Solution of Large-Scale MOS Circuits. DAC 1996: 286-291 - [c6]Peter Feldmann, Jaijeet S. Roychowdhury:
Computation of circuit waveform envelopes using an efficient, matrix-decomposed harmonic balance algorithm. ICCAD 1996: 295-300 - [c5]Sharad Kapur, David E. Long, Jaijeet S. Roychowdhury:
Efficient time-domain simulation of frequency-dependent elements. ICCAD 1996: 569-573 - 1994
- [j1]Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson:
Algorithms for the transient simulation of lossy interconnect. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(1): 96-104 (1994) - 1992
- [c4]Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson:
Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time. DAC 1992: 75-80 - [c3]Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson:
An exact analytic technique for simulating uniform RC lines. EURO-DAC 1992: 416-420 - 1991
- [c2]Jaijeet S. Roychowdhury, Donald O. Pederson:
Efficient Transient Simulation of Lossy Interconnect. DAC 1991: 740-745 - [c1]Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson:
An Impulse-Response Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation. ICCAD 1991: 62-65
Coauthor Index
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