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Jung-Mao Lin
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2010 – 2019
- 2015
- [j5]Jung-Mao Lin, Ching-Yuan Yang:
A Fast-Locking All-Digital Phase-Locked Loop With Dynamic Loop Bandwidth Adjustment. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(10): 2411-2422 (2015) - [j4]Jung-Mao Lin, Ching-Yuan Yang, Hsin-Ming Wu:
A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4× Oversampling. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 791-795 (2015) - 2010
- [j3]Jung-Mao Lin, Hsin-Yi Yu, Yu-Jen Wu, Hsi-Pin Ma:
A Power Efficient Baseband Engine for Multiuser Mobile MIMO-OFDMA Communications. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1779-1792 (2010) - [c7]Jung-Mao Lin, Hsi-Pin Ma, Danijela Cabric:
A Reliable Adaptive Multitaper Spectral Detector in Wideband Strong Interference Environments. GLOBECOM 2010: 1-6
2000 – 2009
- 2009
- [j2]Jung-Mao Lin, Hsi-Pin Ma:
A high performance baseband transceiver for SISO-/MIMO-OFDA uplink communications. IEEE Trans. Wirel. Commun. 8(7): 3330-3334 (2009) - [c6]Tsung-Wei Chiang, Jung-Mao Lin, Hsi-Pin Ma:
Optimal Detector for Multitaper Spectrum Estimator in Cognitive Radios. GLOBECOM 2009: 1-6 - [c5]Yu-Jen Wu, Jung-Mao Lin, Hsin-Yi Yu, Hsi-Pin Ma:
A baseband Testbed for Uplink Mobile MIMO WiMAX Communications. ISCAS 2009: 794-797 - [c4]Yu-Jen Wu, Jung-Mao Lin, Hsin-Yi Yu, Hsi-Pin Ma:
Live Demonstration: A Baseband Testbed for Uplink Mobile MIMO WiMAX Communications. ISCAS 2009: 798 - 2008
- [c3]Kai Pong Wu, Ching-Yuan Yang, Jung-Mao Lin:
A 2.5Gb/s oversampling clock and data recovery circuit with frequency calibration technique. APCCAS 2008: 1356-1359 - 2007
- [j1]Ching-Yuan Yang, Jung-Mao Lin:
A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation. IEICE Trans. Electron. 90-C(1): 196-200 (2007) - [c2]Jung-Mao Lin, Hsi-Pin Ma, Pangan Ting:
A Baseband Transceiver for IEEE 802.16e-2005 MIMO-OFDMA Uplink Communications. GLOBECOM 2007: 4291-4295 - 2006
- [c1]Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang:
A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. ISCAS 2006
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