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Raj S. Mitra
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2000 – 2009
- 2009
- [j6]Soujanna Sarkar, Shashank Dabral, Praveen Tiwari, Raj S. Mitra:
Lessons and Experiences with High-Level Synthesis. IEEE Des. Test Comput. 26(4): 34-45 (2009) - 2008
- [c13]Raj S. Mitra:
Strategies for mainstream usage of formal verification. DAC 2008: 800-805 - 2007
- [j5]Praveen Tiwari, Raj S. Mitra:
Hybrid Verification of Protocol Bridges. IEEE Des. Test Comput. 24(2): 124-131 (2007) - [c12]Lovleen Bhatia, Jayesh Gaur, Praveen Tiwari, Raj S. Mitra, Sunil H. Matange:
Leveraging Semi-Formal and Sequential Equivalence Techniques for Multimedia SOC Performance Validation. DAC 2007: 69-74 - [c11]Praveen Tiwari, Raj S. Mitra, Manu Chopra, Alok Jain:
Tutorial T4B: Formal Assertion-Based Verification in Industrial Setting. VLSI Design 2007: 7 - 2006
- [c10]David Brier, Raj S. Mitra:
Use of C/C++ models for architecture exploration and verification of DSPs. DAC 2006: 79-84 - [c9]Saurav Gorai, Saptarshi Biswas, Lovleen Bhatia, Praveen Tiwari, Raj S. Mitra:
Directed-simulation assisted formal verification of serial protocol and bridge. DAC 2006: 731-736 - [c8]Anmol Mathur, Masahiro Fujita, M. Balakrishnan, Raj S. Mitra:
Sequential Equivalence Checking. VLSI Design 2006: 18-19 - [c7]Praveen Tiwari, Saptarshi Biswas, Raj S. Mitra:
Apriori Formal Coverage Analysis for Protocol Properties. VLSI Design 2006: 231-236 - 2000
- [j4]Raj S. Mitra, Anupam Basu:
Hardware-Software Partitioning: A Case for Constraint Satisfaction. IEEE Intell. Syst. 15(1): 54-63 (2000)
1990 – 1999
- 1998
- [c6]Anupam Basu, Raj S. Mitra, Peter Marwedel:
Interface Synthesis for Embedded Applications in a Co Design Environment. VLSI Design 1998: 85-90 - 1997
- [j3]Raj S. Mitra, Anupam Basu:
Knowledge representation in MICKEY: an expert system for designing microprocessor-based systems. IEEE Trans. Syst. Man Cybern. Part A 27(4): 467-479 (1997) - [c5]Debanjan Saha, Anupam Basu, Raj S. Mitra:
Hardware Software Partitioning Using Genetic Algorithm. VLSI Design 1997: 155-160 - [c4]Raj S. Mitra, Bishnupriya Bhattacharya, Luciano Lavagno:
Asynchronous Implementation of Synchronous Esterel Specifications. VLSI Design 1997: 348-355 - 1996
- [j2]Raj S. Mitra, Partha S. Roop, Anupam Basu:
A new algorithm for implementation of design functions by available devices. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 170-180 (1996) - 1995
- [c3]Raj S. Mitra, Mahmood G. Qadir, Anupam Basu:
A consistent labeling approach to hardware software partitioning. VLSI Design 1995: 19-24 - [c2]Raj S. Mitra, Partha S. Roop, Anupam Basu:
Implementation of design functions by available devices: a new algorithm. VLSI Design 1995: 30-35 - 1994
- [j1]Raj S. Mitra, Mukul Kumar, Anupam Basu:
Design of microprocessor-based systems: a knowledge-based approach. IEEE Trans. Ind. Electron. 41(3): 352-360 (1994) - 1993
- [c1]Raj S. Mitra, Biswaroop Guha, Anupam Basu:
Rapid prototyping of microprocessor-based systems. ICCAD 1993: 600-603
Coauthor Index
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