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dblp: Ming-Ching Lu

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Ming-Ching Lu

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2000 – 2009

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2009
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  - journals/todaes/WuLCJ09
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  - https://dblp.org/rec/journals/todaes/WuLCJ09
Meng-Chen Wu, Ming-Ching Lu, Hung-Ming Chen, Jing-Yang Jou:
Performance-constrained voltage assignment in multiple supply voltage SoC floorplanning. ACM Trans. Design Autom. Electr. Syst. 15(1): 3:1-3:17 (2009)
2006
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Ming-Ching Lu, Meng-Chen Wu, Hung-Ming Chen, Iris Hui-Ru Jiang:
Performance Constraints Aware Voltage Islands Generation in SoC Floorplan Design. SoCC 2006: 211-214

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