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ORCIDJarkko Niittylahti
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2010 – 2019
- 2011
[c22]Juhana Helovuo, Jarkko Niittylahti, Heikki Berg:
Corento - SIMD Parallelism from Portable High-Level Code. PARCO 2011: 271-280
2000 – 2009
- 2005
- [j9]Jarno K. Tanskanen, Reiner Creutzburg
, Jarkko Niittylahti:
On Design of Parallel Memory Access Schemes for Video Coding. J. VLSI Signal Process. 40(2): 215-237 (2005) - 2004
- [j8]Juha Alakarhu, Jarkko Niittylahti:
DRAM performance as a function of its structure and memory stream locality. Microprocess. Microsystems 28(2): 57-68 (2004) - [j7]Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti:
Byte and modulo addressable parallel memory architecture for video coding. IEEE Trans. Circuits Syst. Video Technol. 14(11): 1270-1276 (2004) - [j6]Jarno K. Tanskanen, Jarkko Niittylahti:
Scalable Parallel Memory Architectures for Video Coding. J. VLSI Signal Process. 38(2): 173-199 (2004) - [c21]Juha Alakarhu, Jarkko Niittylahti:
Scalar Metric for Temporal Locality and Estimation of Cache Performance. DATE 2004: 730-731 - 2003
- [j5]Hakan Öktem, Karen O. Egiazarian, Jarkko Niittylahti, Juha Lemmetti:
An Approach to Adaptive Enhancement of Diagnostic X-Ray Images. EURASIP J. Adv. Signal Process. 2003(5): 430-436 (2003) - [c20]Juha Alakarhu, Jarkko Niittylahti:
TraceAnalyzer - an open framework for memory stream analysis. ICECS 2003: 703-706 - [c19]K. I. Palomaki, Jarkko Niittylahti:
A low-power, memoryless direct digital frequency synthesizer architecture. ISCAS (2) 2003: 77-80 - [c18]Florean Curticapean, K. I. Palomaki, Jarkko Niittylahti:
Quadrature direct digital frequency synthesizer using an angle rotation algorithm. ISCAS (2) 2003: 81-84 - [c17]Sakari Junnila, Jarkko Niittylahti:
Wireless technologies for data acquisition systems. ISICT 2003: 132-137 - 2002
- [j4]Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti:
Configurable parallel memory architecture for multimedia computers. J. Syst. Archit. 47(14-15): 1089-1115 (2002) - [j3]Jarkko Niittylahti, Juha Lemmetti, Juhana Helovuo:
High-performance implementation of wavelet algorithms on a standard PC. Microprocess. Microsystems 26(4): 173-179 (2002) - [j2]Juha Alakarhu, Jarkko Niittylahti:
DRAM simulator for design and analysis of digital systems. Microprocess. Microsystems 26(4): 189-198 (2002) - [c16]Tero Rissa, Milan Vasilko, Jarkko Niittylahti:
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. FCCM 2002: 295-296 - [c15]Tero Rissa, Riku Uusikartano, Jarkko Niittylahti:
Adaptive FIR filter architectures for run-time reconfigurable FPGAs. FPT 2002: 52-59 - [c14]Juha Alakarhu, Jarkko Niittylahti:
A comparison of precharge policies with modern DRAM architectures. ICECS 2002: 823-826 - [c13]Florean Curticapean, Jarkko Niittylahti:
Direct digital frequency synthesizers of high spectral purity based on quadratic approximation. ICECS 2002: 1095-1098 - [c12]Sakari Junnila, Jarkko Ruoho, Jarkko Niittylahti:
Medical isolation of universal serial bus data signals. ICECS 2002: 1215-1218 - 2001
- [c11]Florean Curticapean, Jarkko Niittylahti:
A hardware efficient direct digital frequency synthesizer. ICECS 2001: 51-54 - 2000
- [c10]Juha Alakarhu, Jarkko Niittylahti, Tero Sihvo, Jarno K. Tanskanen:
Verifying external data memory interface for H.263 video DSP with memory simulator. EUSIPCO 2000: 1-4 - [c9]Florean Curticapean, Jarkko Niittylahti:
Complex digital oscillator with absolute periodicity. EUSIPCO 2000: 1-4 - [c8]Julia Latvala, Jan Syrjarinne, Hannu Ikonen, Jarkko Niittylahti:
Evaluation of RSSI-based human tracking. EUSIPCO 2000: 1-4 - [c7]Tero Rissa, Jarkko Niittylahti:
A Hybrid Prototyping Platform for Dynamically Reconfigurable Designs. FPL 2000: 371-378 - [c6]Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti, Jarmo Takala, Reiner Creutzburg:
Parallel, memory access schemes for H.263 encoder. ISCAS 2000: 691-694
1990 – 1999
- 1999
- [c5]Jarno K. Tanskanen, Jarkko Niittylahti:
Parallel Memories in Video Encoding. Data Compression Conference 1999: 552 - [c4]K. Palomaki, Jarkko Niittylahti, Markku Renfors:
Numerical sine and cosine synthesis using a complex multiplier. ISCAS (4) 1999: 356-359 - [c3]Riku Uusikartano, Jarkko Niittylahti, Markku Renfors:
Area-optimized FPGA implementation of a digital FM modulator. ISCAS (4) 1999: 360-362 - 1998
- [c2]Tero Rissa, Tommi Mäkeläinen, Jarkko Niittylahti, Jouni Siirtola:
Fast Prototyping Using System Emulators. FPL 1998: 466-470 - 1996
- [j1]Jarkko Niittylahti:
Hardware Prototypes of a Boolean Neural Network and the Simulated Annealing Optimization Method. Int. J. Neural Syst. 7(1): 45-52 (1996) - 1993
- [c1]Jarkko Niittylahti, Harri Raittinen, Kimmo Kaski:
Dynamically Configurable Combinatory Logic Array as Boolean Neural Network. ICTAI 1993: 456-457
Coauthor Index
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