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ORCIDAmir Sabbagh Molahosseini
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2020 – today
- 2024
[j29]Maryam Mirzapour-Moshizi, Vahid Sattari Naeini
, Amir Sabbagh Molahosseini:
Application placement in fog-cum-cloud environment based on a low latency policy-making framework. Clust. Comput. 27(1): 199-217 (2024)- [c8]Amir Sabbagh Molahosseini, Hans Vandierendonck:
Exploiting Data Redundancy in CKKS Encoding for High-Speed Homomorphic Encryption. AsiaCCS 2024 - 2023
- [j28]JunKyu Lee, Lev Mukhanov, Amir Sabbagh Molahosseini, Umar Ibrahim Minhas, Yang Hua, Jesús Martínez del Rincón, Kiril Dichev, Cheol-Ho Hong, Hans Vandierendonck:
Resource-Efficient Convolutional Networks: A Survey on Model-, Arithmetic-, and Implementation-Level Techniques. ACM Comput. Surv. 55(13s): 276:1-276:36 (2023) - [j27]Saeedeh Jahanshahi, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi:
uLog: a software-based approximate logarithmic number system for computations on SIMD processors. J. Supercomput. 79(2): 1750-1783 (2023) - 2022
- [j26]Amir Sabbagh Molahosseini:
Zero-Aware Low-Precision RNS Scaling Scheme. Axioms 11(1): 5 (2022) - [j25]Iraj Naruei, Farshid Keynia, Amir Sabbagh Molahosseini:
Hunter-prey optimization: algorithm and applications. Soft Comput. 26(3): 1279-1314 (2022) - [j24]Akram Mohammadi, Mokhtar Mohammadi Ghanatghestani, Amir Sabbagh Molahosseini, Yavar Safaei Mehrabani:
Image processing with high-speed and low-energy approximate arithmetic circuit. Sustain. Comput. Informatics Syst. 36: 100785 (2022) - [j23]Mahmood Lakzaei, Vahid Sattari Naeini, Amir Sabbagh Molahosseini, Amir Javadpour:
A joint computational and resource allocation model for fast parallel data processing in fog computing. J. Supercomput. 78(10): 12662-12685 (2022) - [p1]Amir Sabbagh Molahosseini, Leonel Sousa, Azadeh Alsadat Emrani Zarandi, Hans Vandierendonck:
Low-Precision Floating-Point Formats: From General-Purpose to Application-Specific. Approximate Computing 2022: 77-98 - 2021
- [j22]Mohsen Mojahed, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi:
A Multifunctional Unit For Reverse Conversion and Sign Detection Based on The 5-Moduli Set. Comput. Sci. 22(1) (2021) - [j21]Hoda Ghabeli, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Leonel Sousa:
Variable Latency Carry Speculative Adders with Input-based Dynamic Configuration. Comput. Electr. Eng. 93: 107247 (2021) - [j20]Katayoun Bakhshi Kiadehi, Amir Masoud Rahmani, Amir Sabbagh Molahosseini:
Increasing fault tolerance of data plane on the internet of things using the software-defined networks. PeerJ Comput. Sci. 7: e543 (2021) - [j19]MohammadReza Taheri, Amir Sabbagh Molahosseini, Keivan Navi:
Efficient Incorporation of the RNS Datapath in Reverse Converter. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1388-1392 (2021) - [j18]Katayoun Bakhshi Kiadehi, Amir Masoud Rahmani, Amir Sabbagh Molahosseini:
A fault-tolerant architecture for internet-of-things based on software-defined networks. Telecommun. Syst. 77(1): 155-169 (2021) - [i1]JunKyu Lee, Lev Mukhanov, Amir Sabbagh Molahosseini, Umar Ibrahim Minhas, Yang Hua, Jesús Martínez del Rincón, Kiril Dichev, Cheol-Ho Hong, Hans Vandierendonck:
Resource-Efficient Deep Learning: A Survey on Model-, Arithmetic-, and Implementation-Level Techniques. CoRR abs/2112.15131 (2021) - 2020
- [c7]Amir Sabbagh Molahosseini, Hans Vandierendonck:
Half-Precision Floating-Point Formats for PageRank: Opportunities and Challenges. HPEC 2020: 1-7
2010 – 2019
- 2019
- [j17]Fereshteh Jafarzadehpour, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Leonel Sousa:
New energy-efficient hybrid wide-operand adder architecture. IET Circuits Devices Syst. 13(8): 1221-1231 (2019) - [j16]Fereshteh Jafarzadehpour, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Leonel Sousa:
Efficient Modular Adder Designs Based on Thermometer and One-Hot Coding. IEEE Trans. Very Large Scale Integr. Syst. 27(9): 2142-2155 (2019) - 2018
- [c6]Amir Sabbagh Molahosseini, Ailin Asadpoor, Azadeh Alsadat Emrani Zarandi, Leonel Sousa:
Towards Efficient Modular Adders based on Reversible Circuits. ISCAS 2018: 1-5 - 2017
- [j15]Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Paulo Martins, Leonel Sousa:
A Multifunctional Unit for Designing Efficient RNS-Based Datapaths. IEEE Access 5: 25972-25986 (2017) - [j14]Nikolay I. Chervyakov, Amir Sabbagh Molahosseini, Pavel Alekseevich Lyakhov, Mikhail G. Babenko, Maxim Anatolievich Deryabin:
Residue-to-binary conversion for general moduli sets based on approximate Chinese remainder theorem. Int. J. Comput. Math. 94(9): 1833-1849 (2017) - [j13]Seyed Mostafa Mirhosseini, Amir Sabbagh Molahosseini, Mehdi Hosseinzadeh, Leonel Sousa, Paulo Martins:
A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2n + 1 Multiplier. IEEE Trans. Circuits Syst. II Express Briefs 64-II(7): 817-821 (2017) - [j12]Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini, Leonel Sousa, Mehdi Hosseinzadeh:
An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form {2k, 2P-1}. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 48-59 (2017) - 2016
- [c5]Héctor Pettenghi, Roberto de Matos, Amir Sabbagh Molahosseini:
RNS reverse converters for moduli sets with dynamic ranges of 9n-bit. LASCAS 2016: 143-146 - [c4]Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini, Leonel Sousa, Mehdi Hosseinzadeh, Keivan Navi:
Area-delay-power-aware adder placement method for RNS reverse converter design. LASCAS 2016: 223-226 - 2015
- [j11]Nikolay I. Chervyakov, Amir Sabbagh Molahosseini, Pavel Alekseevich Lyakhov, Mikhail G. Babenko, Irina N. Lavrinenko, Anton V. Lavrinenko:
Comparison of modular numbers based on the chinese remainder theorem with fractional values. Autom. Control. Comput. Sci. 49(6): 354-365 (2015) - [j10]Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini, Mehdi Hosseinzadeh, Saeid Sorouri, Samuel Antão, Leonel Sousa:
Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 374-378 (2015) - 2014
- [c3]Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Seyed Mostafa Mirhosseini, Mehdi Hosseinzadeh:
Rethinking reverse converter design: From algorithms to hardware components. ISIC 2014: 444-447 - 2012
- [j9]Mohammad Esmaeildoust, Keivan Navi, MohammadReza Taheri, Amir Sabbagh Molahosseini, Siavash Khodambashi:
Efficient RNS to binary converters for the new 4-moduli set {2n, 2n+1-1, 2n-1, 2n-1-1}. IEICE Electron. Express 9(1): 1-7 (2012) - 2011
- [j8]Keivan Navi, Mohammad Esmaeildoust, Amir Sabbagh Molahosseini:
A General Reverse Converter Architecture with Low Complexity and High Performance. IEICE Trans. Inf. Syst. 94-D(2): 264-273 (2011) - [j7]Keivan Navi, Amir Sabbagh Molahosseini, Mohammad Esmaeildoust:
How to Teach Residue Number System to Computer Scientists and Engineers. IEEE Trans. Educ. 54(1): 156-163 (2011) - 2010
- [j6]Amir Sabbagh Molahosseini, M. Kuchaki Rafsanjani, S. H. Ghafouri, M. Hashemipour:
A Reduced-Area Reverse Converter for the Moduli Set {2n, 2n-1, 22n-1-1}. Int. J. Adv. Comp. Techn. 2(5): 61-65 (2010) - [j5]Amir Sabbagh Molahosseini, Keivan Navi, Chitra Dadkhah, Omid Kavehei, Somayeh Timarchi:
Efficient Reverse Converter Designs for the New 4-Moduli Sets 2n -1, 2n, 2n +1, 22n + 1-1 and 2n -1, 2n +1, 22n, 22n +1 Based on New CRTs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 823-835 (2010) - [c2]Amir Sabbagh Molahosseini, Faegheh Teymouri, Keivan Navi:
A new four-modulus RNS to binary converter. ISCAS 2010: 4161-4164 - [c1]Amir Sabbagh Molahosseini, Keivan Navi:
A Reverse Converter for the Enhanced Moduli Set {2n-1, 2n+1, 22n, 22n+1-1} Using CRT and MRC. ISVLSI 2010: 456-457
2000 – 2009
- 2009
- [j4]Amir Sabbagh Molahosseini, Chitra Dadkhah, Keivan Navi:
A new five-moduli set for efficient hardware implementation of the reverse converter. IEICE Electron. Express 6(14): 1006-1012 (2009) - [j3]Amir Sabbagh Molahosseini, Chitra Dadkhah, Keivan Navi, Mohammad Eshghi:
Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {22n, 2n -1, 2n+1 -1} and {22n, 2n -1, 2n-1 -1}. IEICE Trans. Inf. Syst. 92-D(9): 1628-1638 (2009) - 2008
- [j2]Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini, Keivan Navi:
An improved reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}. IEICE Electron. Express 5(17): 672-677 (2008) - [j1]Amir Sabbagh Molahosseini, Keivan Navi, Omid Hashemipour, Ali Jalali:
An efficient architecture for designing reverse converters based on a general three-moduli set. J. Syst. Archit. 54(10): 929-934 (2008)
Coauthor Index
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