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ORCIDJaewoong Sim
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2020 – today
- 2024
[j5]Ruobing Han, Jun Chen, Bhanu Garg, Xule Zhou, John Lu, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: Making CUDA a Portable Language. ACM Trans. Design Autom. Electr. Syst. 29(4): 1-25 (2024)- [c24]Junseo Lee
, Seokwon Lee, Jungi Lee, Junyong Park, Jaewoong Sim:
GSCore: Efficient Radiance Field Rendering via Architectural Support for 3D Gaussian Splatting. ASPLOS (3) 2024: 497-511 - [c23]Taehyun Kim, Kwanseok Choi, Youngmock Cho, Jaehoon Cho, Hyuk-Jae Lee, Jaewoong Sim:
MoNDE: Mixture of Near-Data Experts for Large-Scale Sparse Models. DAC 2024: 221:1-221:6 - [c22]Jungi Lee, Wonbeom Lee, Jaewoong Sim:
Tender: Accelerating Large Language Models via Tensor Decomposition and Runtime Requantization. ISCA 2024: 1048-1062 - [c21]Wonbeom Lee, Jungi Lee, Junghwan Seo, Jaewoong Sim:
InfiniGen: Efficient Generative Inference of Large Language Models with Dynamic KV Cache Management. OSDI 2024: 155-172 - [i6]Taehyun Kim, Kwanseok Choi, Youngmock Cho, Jaehoon Cho, Hyuk-Jae Lee, Jaewoong Sim:
MoNDE: Mixture of Near-Data Experts for Large-Scale Sparse Models. CoRR abs/2405.18832 (2024) - [i5]Jungi Lee, Wonbeom Lee, Jaewoong Sim:
Tender: Accelerating Large Language Models via Tensor Decomposition and Runtime Requantization. CoRR abs/2406.12930 (2024) - [i4]Wonbeom Lee, Jungi Lee, Junghwan Seo, Jaewoong Sim:
InfiniGen: Efficient Generative Inference of Large Language Models with Dynamic KV Cache Management. CoRR abs/2406.19707 (2024) - 2023
- [c20]Hyokeun Lee, Kwanseok Choi, Hyuk-Jae Lee, Jaewoong Sim:
SDM: Sharing-Enabled Disaggregated Memory System with Cache Coherent Compute Express Link. PACT 2023: 86-98 - [c19]Junseo Lee, Kwanseok Choi, Jungi Lee, Seokwon Lee, Joonho Whangbo, Jaewoong Sim:
NeuRex: A Case for Neural Rendering Acceleration. ISCA 2023: 21:1-21:13 - [c18]Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: A Framework to Make CUDA Portable. PPoPP 2023: 444-446 - 2022
- [j4]Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
COX : Exposing CUDA Warp-level Functions to CPUs. ACM Trans. Archit. Code Optim. 19(4): 59:1-59:25 (2022) - [i3]Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: CUDA for Parallelized and Broad-range Processors. CoRR abs/2206.07896 (2022) - 2021
- [j3]Rui Ma, Jia-Ching Hsu, Tian Tan, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu, Derek Chiou:
Specializing FGPU for Persistent Deep Learning. ACM Trans. Reconfigurable Technol. Syst. 14(2): 10:1-10:23 (2021) - [i2]Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
Supporting CUDA for an extended RISC-V GPU architecture. CoRR abs/2109.00673 (2021) - [i1]Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
COX: CUDA on X86 by Exposing Warp-Level Functions to CPUs. CoRR abs/2112.10034 (2021) - 2020
- [c17]Hyojong Kim, Jaewoong Sim, Prasun Gera, Ramyad Hadidi, Hyesoon Kim:
Batch-Aware Unified Memory Management in GPUs for Irregular Workloads. ASPLOS 2020: 1357-1370
2010 – 2019
- 2019
- [j2]Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim:
Thermal-aware processing-in-memory instruction offloading. J. Parallel Distributed Comput. 130: 193-207 (2019) - [c16]Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu:
Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs. FCCM 2019: 199-207 - [c15]Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu:
Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI. FPGA 2019: 119 - [c14]Rui Ma, Derek Chiou, Jia-Ching Hsu, Tian Tan, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu:
Specializing FGPU for Persistent Deep Learning. FPL 2019: 326-333 - 2018
- [c13]Duncan J. M. Moss, Krishnan Srivatsan, Eriko Nurvitadhi, Piotr Ratuszniak, Chris Johnson, Jaewoong Sim, Asit K. Mishra, Debbie Marr, Suchit Subhaschandra, Philip Heng Wai Leong:
A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study. FPGA 2018: 107-116 - [c12]Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim:
CoolPIM: Thermal-Aware Source Throttling for Efficient PIM Instruction Offloading. IPDPS 2018: 680-689 - 2017
- [c11]Eriko Nurvitadhi, Ganesh Venkatesh, Jaewoong Sim, Debbie Marr, Randy Huang, Jason Ong Gee Hock, Yeong Tat Liew, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra, Guy Boudoukh:
Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks? FPGA 2017: 5-14 - [c10]Duncan J. M. Moss, Eriko Nurvitadhi, Jaewoong Sim, Asit K. Mishra, Debbie Marr, Suchit Subhaschandra, Philip Heng Wai Leong:
High performance binary neural networks on the Xeon+FPGA™ platform. FPL 2017: 1-4 - [c9]Lifeng Nai, Ramyad Hadidi, Jaewoong Sim, Hyojong Kim, Pranith Kumar, Hyesoon Kim:
GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks. HPCA 2017: 457-468 - 2016
- [c8]Eriko Nurvitadhi, Jaewoong Sim, David Sheffield, Asit K. Mishra, Krishnan Srivatsan, Debbie Marr:
Accelerating recurrent neural networks in analytics servers: Comparison of FPGA, CPU, GPU, and ASIC. FPL 2016: 1-4 - [c7]Eriko Nurvitadhi, David Sheffield, Jaewoong Sim, Asit K. Mishra, Ganesh Venkatesh, Debbie Marr:
Accelerating Binarized Neural Networks: Comparison of FPGA, CPU, GPU, and ASIC. FPT 2016: 77-84 - 2015
- [c6]Joo Hwan Lee, Jaewoong Sim, Hyesoon Kim:
BSSync: Processing Near Memory for Machine Learning Workloads with Bounded Staleness Consistency Models. PACT 2015: 241-252 - 2014
- [j1]Jaewoong Sim, Gabriel H. Loh, Vilas Sridharan, Mike O'Connor:
A Configurable and Strong RAS Solution for Die-Stacked DRAM Caches. IEEE Micro 34(3): 80-90 (2014) - [c5]Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim:
Transparent Hardware Management of Stacked DRAM as Part of Memory. MICRO 2014: 13-24 - 2013
- [c4]Jaewoong Sim, Gabriel H. Loh, Vilas Sridharan, Mike O'Connor:
Resilient die-stacked DRAM caches. ISCA 2013: 416-427 - 2012
- [c3]Jaewoong Sim, Jaekyu Lee, Moinuddin K. Qureshi, Hyesoon Kim:
FLEXclusion: Balancing cache capacity and on-chip bandwidth via Flexible Exclusion. ISCA 2012: 321-332 - [c2]Jaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi:
A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch. MICRO 2012: 247-257 - [c1]Jaewoong Sim, Aniruddha Dasgupta, Hyesoon Kim, Richard W. Vuduc:
A performance analysis framework for identifying potential benefits in GPGPU applications. PPoPP 2012: 11-22
Coauthor Index
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last updated on 2024-12-03 20:28 CET by the dblp team
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