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Link to original content: https://dblp.org/pid/190/7785.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/asplos/ChengCCBD24 AU - Cheng, Jianyi AU - Coward, Samuel AU - Chelini, Lorenzo AU - Barbalho, Rafael AU - Drane, Theo TI - SEER: Super-Optimization Explorer for High-Level Synthesis using E-graph Rewriting. BT - Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024 SP - 1029 EP - 1044 PY - 2024// DO - 10.1145/3620665.3640392 UR - https://doi.org/10.1145/3620665.3640392 ER - TY - CPAPER ID - DBLP:conf/fpl/YuSAWMZCBZ24 AU - Yu, Zhewen AU - Sreeram, Sudarshan AU - Agrawal, Krish AU - Wu, Junyi AU - Montgomerie-Corcoran, Alexander AU - Zhang, Cheng AU - Cheng, Jianyi AU - Bouganis, Christos-Savvas AU - Zhao, Yiren TI - HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator. BT - 34th International Conference on Field-Programmable Logic and Applications, FPL 2024, Torino, Italy, September 2-6, 2024 SP - 257 EP - 263 PY - 2024// DO - 10.1109/FPL64840.2024.00043 UR - https://doi.org/10.1109/FPL64840.2024.00043 ER - TY - CPAPER ID - DBLP:conf/icml/ZhangCCZ24 AU - Zhang, Cheng AU - Cheng, Jianyi AU - Constantinides, George Anthony AU - Zhao, Yiren TI - LQER: Low-Rank Quantization Error Reconstruction for LLMs. BT - Forty-first International Conference on Machine Learning, ICML 2024, Vienna, Austria, July 21-27, 2024 PY - 2024// UR - https://openreview.net/forum?id=dh8k41g775 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2402-02446 AU - Zhang, Cheng AU - Cheng, Jianyi AU - Constantinides, George A. AU - Zhao, Yiren TI - LQER: Low-Rank Quantization Error Reconstruction for LLMs. JO - CoRR VL - abs/2402.02446 PY - 2024// DO - 10.48550/ARXIV.2402.02446 UR - https://doi.org/10.48550/arXiv.2402.02446 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2406-03088 AU - Yu, Zhewen AU - Sreeram, Sudarshan AU - Agrawal, Krish AU - Wu, Junyi AU - Montgomerie-Corcoran, Alexander AU - Zhang, Cheng AU - Cheng, Jianyi AU - Bouganis, Christos-Savvas AU - Zhao, Yiren TI - HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator. JO - CoRR VL - abs/2406.03088 PY - 2024// DO - 10.48550/ARXIV.2406.03088 UR - https://doi.org/10.48550/arXiv.2406.03088 ER - TY - JOUR ID - DBLP:journals/tc/ChengFWC23 AU - Cheng, Jianyi AU - Fraca, Estíbaliz AU - Wickerson, John AU - Constantinides, George A. TI - Balancing Static Islands in Dynamically Scheduled Circuits Using Continuous Petri Nets. JO - IEEE Trans. Computers VL - 72 IS - 11 SP - 3300 EP - 3313 PY - 2023/11/ DO - 10.1109/TC.2023.3292590 UR - https://doi.org/10.1109/TC.2023.3292590 ER - TY - JOUR ID - DBLP:journals/trets/ChengJWC23 AU - Cheng, Jianyi AU - Josipovic, Lana AU - Wickerson, John AU - Constantinides, George A. TI - Parallelising Control Flow in Dynamic-scheduling High-level Synthesis. JO - ACM Trans. Reconfigurable Technol. Syst. VL - 16 IS - 4 SP - 55:1 EP - 55:32 PY - 2023/12/ DO - 10.1145/3599973 UR - https://doi.org/10.1145/3599973 ER - TY - CPAPER ID - DBLP:conf/emnlp/ZhangCSCZ23 AU - Zhang, Cheng AU - Cheng, Jianyi AU - Shumailov, Ilia AU - Constantinides, George A. AU - Zhao, Yiren TI - Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference? BT - Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing, EMNLP 2023, Singapore, December 6-10, 2023 SP - 9988 EP - 10006 PY - 2023// DO - 10.18653/V1/2023.EMNLP-MAIN.617 UR - https://doi.org/10.18653/v1/2023.emnlp-main.617 UR - https://aclanthology.org/2023.emnlp-main.617 ER - TY - CPAPER ID - DBLP:conf/fpl/MontgomerieCorcoranYCB23 AU - Montgomerie-Corcoran, Alexander AU - Yu, Zhewen AU - Cheng, Jianyi AU - Bouganis, Christos-Savvas TI - PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration. BT - 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023 SP - 288 EP - 293 PY - 2023// DO - 10.1109/FPL60245.2023.00049 UR - https://doi.org/10.1109/FPL60245.2023.00049 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2307-07821 AU - Montgomerie-Corcoran, Alexander AU - Yu, Zhewen AU - Cheng, Jianyi AU - Bouganis, Christos-Savvas TI - PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration. JO - CoRR VL - abs/2307.07821 PY - 2023// DO - 10.48550/ARXIV.2307.07821 UR - https://doi.org/10.48550/arXiv.2307.07821 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2307-15517 AU - Cheng, Jianyi AU - Zhang, Cheng AU - Yu, Zhewen AU - Montgomerie-Corcoran, Alexander AU - Xiao, Can AU - Bouganis, Christos-Savvas AU - Zhao, Yiren TI - Fast Prototyping Next-Generation Accelerators for New ML Models using MASE: ML Accelerator System Exploration. JO - CoRR VL - abs/2307.15517 PY - 2023// DO - 10.48550/ARXIV.2307.15517 UR - https://doi.org/10.48550/arXiv.2307.15517 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2308-07654 AU - Cheng, Jianyi AU - Coward, Samuel AU - Chelini, Lorenzo AU - Barbalho, Rafael AU - Drane, Theo TI - SEER: Super-Optimization Explorer for HLS using E-graph Rewriting with MLIR. JO - CoRR VL - abs/2308.07654 PY - 2023// DO - 10.48550/ARXIV.2308.07654 UR - https://doi.org/10.48550/arXiv.2308.07654 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2308-11048 AU - Rajagopal, Aditya AU - Vink, Diederik Adriaan AU - Cheng, Jianyi AU - Herklotz, Yann TI - GSA to HDL: Towards principled generation of dynamically scheduled circuits. JO - CoRR VL - abs/2308.11048 PY - 2023// DO - 10.48550/ARXIV.2308.11048 UR - https://doi.org/10.48550/arXiv.2308.11048 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2310-05079 AU - Zhang, Cheng AU - Cheng, Jianyi AU - Shumailov, Ilia AU - Constantinides, George A. AU - Zhao, Yiren TI - Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference? JO - CoRR VL - abs/2310.05079 PY - 2023// DO - 10.48550/ARXIV.2310.05079 UR - https://doi.org/10.48550/arXiv.2310.05079 ER - TY - JOUR ID - DBLP:journals/tc/ChengFCAWC22 AU - Cheng, Jianyi AU - Fleming, Shane T. AU - Chen, Yu Ting AU - Anderson, Jason Helge AU - Wickerson, John AU - Constantinides, George A. TI - Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code. JO - IEEE Trans. Computers VL - 71 IS - 4 SP - 933 EP - 946 PY - 2022// DO - 10.1109/TC.2021.3066466 UR - https://doi.org/10.1109/TC.2021.3066466 ER - TY - JOUR ID - DBLP:journals/tcad/ChengJCIW22 AU - Cheng, Jianyi AU - Josipovic, Lana AU - Constantinides, George A. AU - Ienne, Paolo AU - Wickerson, John TI - DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis. JO - IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. VL - 41 IS - 3 SP - 628 EP - 641 PY - 2022// DO - 10.1109/TCAD.2021.3065902 UR - https://doi.org/10.1109/TCAD.2021.3065902 ER - TY - CPAPER ID - DBLP:conf/fccm/ChengWC22 AU - Cheng, Jianyi AU - Wickerson, John AU - Constantinides, George A. TI - Dynamic C-Slow Pipelining for HLS. BT - 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2022, New York City, NY, USA, May 15-18, 2022 SP - 1 EP - 10 PY - 2022// DO - 10.1109/FCCM53951.2022.9786096 UR - https://doi.org/10.1109/FCCM53951.2022.9786096 ER - TY - CPAPER ID - DBLP:conf/fpga/ChengWC22 AU - Cheng, Jianyi AU - Wickerson, John AU - Constantinides, George A. TI - Finding and Finessing Static Islands in Dynamically Scheduled Circuits. BT - FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022 SP - 89 EP - 100 PY - 2022// DO - 10.1145/3490422.3502362 UR - https://doi.org/10.1145/3490422.3502362 ER - TY - CPAPER ID - DBLP:conf/fpl/ZhaoCLC22 AU - Zhao, Ruizhe AU - Cheng, Jianyi AU - Luk, Wayne AU - Constantinides, George A. TI - POLSCA: Polyhedral High-Level Synthesis with Compiler Transformations. BT - 32nd International Conference on Field-Programmable Logic and Applications, FPL 2022, Belfast, United Kingdom, August 29 - Sept. 2, 2022 SP - 235 EP - 242 PY - 2022// DO - 10.1109/FPL57034.2022.00044 UR - https://doi.org/10.1109/FPL57034.2022.00044 ER - TY - CPAPER ID - DBLP:conf/fpl/ChengJCW22 AU - Cheng, Jianyi AU - Josipovic, Lana AU - Constantinides, George A. AU - Wickerson, John TI - Dynamic Inter-Block Scheduling for HLS. BT - 32nd International Conference on Field-Programmable Logic and Applications, FPL 2022, Belfast, United Kingdom, August 29 - Sept. 2, 2022 SP - 243 EP - 252 PY - 2022// DO - 10.1109/FPL57034.2022.00045 UR - https://doi.org/10.1109/FPL57034.2022.00045 ER - TY - CPAPER ID - DBLP:conf/fpt/HeCC22 AU - He, Xuefei AU - Cheng, Jianyi AU - Constantinides, George A. TI - Area-Efficient Memory Scheduling for Dynamically Scheduled High-Level Synthesis. BT - International Conference on Field-Programmable Technology, (IC)FPT 2022, Hong Kong, December 5-9, 2022 SP - 1 EP - 4 PY - 2022// DO - 10.1109/ICFPT56656.2022.9974262 UR - https://doi.org/10.1109/ICFPT56656.2022.9974262 ER - TY - CPAPER ID - DBLP:conf/hpca/YeHCJHNC22 AU - Ye, Hanchen AU - Hao, Cong AU - Cheng, Jianyi AU - Jeong, Hyunmin AU - Huang, Jack AU - Neuendorffer, Stephen AU - Chen, Deming TI - ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation. BT - IEEE International Symposium on High-Performance Computer Architecture, HPCA 2022, Seoul, South Korea, April 2-6, 2022 SP - 741 EP - 755 PY - 2022// DO - 10.1109/HPCA53966.2022.00060 UR - https://doi.org/10.1109/HPCA53966.2022.00060 ER - TY - CPAPER ID - DBLP:conf/fccm/ChengWC21 AU - Cheng, Jianyi AU - Wickerson, John AU - Constantinides, George A. TI - Probabilistic Scheduling in High-Level Synthesis. BT - 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2021, Orlando, FL, USA, May 9-12, 2021 SP - 195 EP - 203 PY - 2021// DO - 10.1109/FCCM51124.2021.00031 UR - https://doi.org/10.1109/FCCM51124.2021.00031 ER - TY - CPAPER ID - DBLP:conf/fpga/ChengWC21 AU - Cheng, Jianyi AU - Wickerson, John AU - Constantinides, George A. TI - Probabilistic Optimization for High-Level Synthesis. BT - FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021 SP - 145 PY - 2021// DO - 10.1145/3431920.3439455 UR - https://doi.org/10.1145/3431920.3439455 ER - TY - CPAPER ID - DBLP:conf/fpl/ChengWC21 AU - Cheng, Jianyi AU - Wickerson, John AU - Constantinides, George A. TI - Exploiting the Correlation between Dependence Distance and Latency in Loop Pipelining for HLS. BT - 31st International Conference on Field-Programmable Logic and Applications, FPL 2021, Dresden, Germany, August 30 - Sept. 3, 2021 SP - 341 EP - 346 PY - 2021// DO - 10.1109/FPL53798.2021.00066 UR - https://doi.org/10.1109/FPL53798.2021.00066 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2102-10560 AU - Lian, Yijiang AU - Liu, Yubo AU - Ye, Zhicong AU - Yuan, Liang AU - Zhu, Yanfeng AU - Zhao, Min AU - Cheng, Jianyi AU - Feng, Xinwei TI - A Concept Knowledge-Driven Keywords Retrieval Framework for Sponsored Search. JO - CoRR VL - abs/2102.10560 PY - 2021// UR - https://arxiv.org/abs/2102.10560 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2103-15103 AU - Zhao, Ruizhe AU - Cheng, Jianyi TI - Phism: Polyhedral High-Level Synthesis in MLIR. JO - CoRR VL - abs/2103.15103 PY - 2021// UR - https://arxiv.org/abs/2103.15103 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2107-11673 AU - Ye, Hanchen AU - Hao, Cong AU - Cheng, Jianyi AU - Jeong, Hyunmin AU - Huang, Jack AU - Neuendorffer, Stephen AU - Chen, Deming TI - ScaleHLS: Scalable High-Level Synthesis through MLIR. JO - CoRR VL - abs/2107.11673 PY - 2021// UR - https://arxiv.org/abs/2107.11673 ER - TY - CPAPER ID - DBLP:conf/fpga/ChengJCIW20 AU - Cheng, Jianyi AU - Josipovic, Lana AU - Constantinides, George A. AU - Ienne, Paolo AU - Wickerson, John TI - Combining Dynamic & Static Scheduling in High-level Synthesis. BT - FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020 SP - 288 EP - 298 PY - 2020// DO - 10.1145/3373087.3375297 UR - https://doi.org/10.1145/3373087.3375297 ER - TY - CPAPER ID - DBLP:conf/fpga/ChengFCAC19 AU - Cheng, Jianyi AU - Fleming, Shane T. AU - Chen, Yu Ting AU - Anderson, Jason Helge AU - Constantinides, George A. TI - EASY: Efficient Arbiter SYnthesis from Multi-threaded Code. BT - Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019, Seaside, CA, USA, February 24-26, 2019 SP - 142 EP - 151 PY - 2019// DO - 10.1145/3289602.3293899 UR - https://doi.org/10.1145/3289602.3293899 ER - TY - JOUR ID - DBLP:journals/jbi/HeDGYJYCQ17 AU - He, Bin AU - Dong, Bin AU - Guan, Yi AU - Yang, Jinfeng AU - Jiang, Zhipeng AU - Yu, Qiubin AU - Cheng, Jianyi AU - Qu, Chunyan TI - Building a comprehensive syntactic and semantic corpus of Chinese clinical texts. JO - J. Biomed. Informatics VL - 69 SP - 203 EP - 217 PY - 2017// DO - 10.1016/J.JBI.2017.04.006 UR - https://doi.org/10.1016/j.jbi.2017.04.006 UR - https://www.wikidata.org/entity/Q38378149 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/HeDGYJYCQ16 AU - He, Bin AU - Dong, Bin AU - Guan, Yi AU - Yang, Jinfeng AU - Jiang, Zhipeng AU - Yu, Qiubin AU - Cheng, Jianyi AU - Qu, Chunyan TI - Building a comprehensive syntactic and semantic corpus of Chinese clinical texts. JO - CoRR VL - abs/1611.02091 PY - 2016// UR - http://arxiv.org/abs/1611.02091 ER - TY - JOUR ID - DBLP:journals/jbi/HeGCCH15 AU - He, Bin AU - Guan, Yi AU - Cheng, Jianyi AU - Cen, Keting AU - Hua, Wenlan TI - CRFs based de-identification of medical records. JO - J. Biomed. Informatics VL - 58 SP - S39 EP - S46 PY - 2015// DO - 10.1016/J.JBI.2015.08.012 UR - https://doi.org/10.1016/j.jbi.2015.08.012 UR - https://www.wikidata.org/entity/Q28597722 ER -