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Matteo Tomasi
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2010 – 2019
- 2016
- [j10]Matteo Tomasi, Shrinivas J. Pundlik, Gang Luo:
FPGA-DSP co-processing for feature tracking in smart video sensors. J. Real Time Image Process. 11(4): 751-767 (2016) - 2015
- [j9]Francisco Barranco, Matteo Tomasi, Mauricio Vanegas, Javier Díaz, Sara Granados, Eduardo Ros Vidal:
Hierarchical architecture for motion and depth estimations based on color cues. J. Real Time Image Process. 10(2): 435-452 (2015) - 2013
- [j8]Francisco Barranco, Matteo Tomasi, Javier Díaz, Mauricio Vanegas, Eduardo Ros:
Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs. Digit. Signal Process. 23(2): 675-688 (2013) - [c4]Shrinivas J. Pundlik, Matteo Tomasi, Gang Luo:
Collision Detection for Visually Impaired from a Body-Mounted Camera. CVPR Workshops 2013: 41-47 - 2012
- [j7]Karl Pauwels, Matteo Tomasi, Javier Díaz Alonso, Eduardo Ros, Marc M. Van Hulle:
A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features. IEEE Trans. Computers 61(7): 999-1012 (2012) - [j6]Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros:
Massive Parallel-Hardware Architecture for Multiscale Stereo, Optical Flow and Image-Structure Computation. IEEE Trans. Circuits Syst. Video Technol. 22(2): 282-294 (2012) - [j5]Francisco Barranco, Matteo Tomasi, Javier Díaz, Mauricio Vanegas, Eduardo Ros:
Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 20(6): 1058-1067 (2012) - [j4]Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros:
Real-Time Architecture for a Robust Multi-Scale Stereo Engine on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2208-2219 (2012) - 2011
- [c3]Mauricio Vanegas, Leonardo Rubio, Matteo Tomasi, Javier Díaz, Eduardo Ros:
On-Chip Ego-Motion Estimation Based on Optical Flow. ARC 2011: 206-217 - [c2]Francisco Barranco, Matteo Tomasi, Javier Díaz, Eduardo Ros:
Hierarchical Optical Flow Estimation Architecture Using Color Cues. ARC 2011: 269-274 - 2010
- [j3]Mauricio Vanegas, Matteo Tomasi, Javier Díaz, Eduardo Ros Vidal:
Multi-port abstraction layer for FPGA intensive memory exploitation applications. J. Syst. Archit. 56(9): 442-451 (2010) - [j2]Matteo Tomasi, Francisco Barranco, Mauricio Vanegas, Javier Díaz, Eduardo Ros Vidal:
Fine grain pipeline architecture for high performance phase-based optical flow computation. J. Syst. Archit. 56(11): 577-587 (2010) - [j1]Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros:
High-Performance Optical-Flow Architecture Based on a Multi-Scale, Multi-Orientation Phase-Based Model. IEEE Trans. Circuits Syst. Video Technol. 20(12): 1797-1807 (2010)
2000 – 2009
- 2007
- [c1]Matteo Tomasi, Javier Díaz, Eduardo Ros:
Real Time Architectures for Moving-Objects Tracking. ARC 2007: 365-372
Coauthor Index
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