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2020 – today
- 2024
[j9]Anupreetham Anupreetham
, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-Sun Seo:
High Throughput FPGA-Based Object Detection via Algorithm-Hardware Co-Design. ACM Trans. Reconfigurable Technol. Syst. 17(1): 1:1-1:20 (2024)- [c20]Taikun Zhang, Andrew Boutros, Sergey Gribok, Kwadwo Boateng, Vaughn Betz:
Stay Flexible: A High-Performance FPGA NPU Overlay for Graph Neural Networks. FCCM 2024: 222 - [c19]Taikun Zhang, Andrew Boutros, Sergey Gribok, Kwadwo Boateng, Vaughn Betz:
A Software-Programmable Neural Processing Unit for Graph Neural Network Inference on FPGAs. FPL 2024: 187-196 - [i5]Andrew Boutros, Aman Arora, Vaughn Betz:
Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions. CoRR abs/2404.10076 (2024) - 2023
- [j8]Suyeon Hur, Seongmin Na, Dongup Kwon, Joonsung Kim, Andrew Boutros, Eriko Nurvitadhi, Jangwoo Kim:
A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks. ACM Trans. Archit. Code Optim. 20(1): 11:1-11:24 (2023) - [j7]Aman Arora, Andrew Boutros, Seyed Alireza Damghani, Karan Mathur, Vedant Mohanty, Tanmay Anand, Mohamed A. Elgammal, Kenneth B. Kent, Vaughn Betz, Lizy K. John:
Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3895-3909 (2023) - [c18]Srivatsan Srinivasan, Andrew Boutros, Fatemehsadat Mahmoudi, Vaughn Betz:
Placement Optimization for NoC-Enhanced FPGAs. FCCM 2023: 41-51 - [c17]Andrew Boutros, Stephen More, Vaughn Betz:
A Whole New World: How to Architect Beyond-FPGA Reconfigurable Acceleration Devices? FPL 2023: 265-270 - [c16]Andrew Boutros, Fatemehsadat Mahmoudi, Amin Mohaghegh, Stephen More, Vaughn Betz:
Into the Third Dimension: Architecture Exploration Tools for 3D Reconfigurable Acceleration Devices. ICFPT 2023: 198-208 - [i4]Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz:
RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices. CoRR abs/2301.04767 (2023) - 2022
- [j6]Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz:
Architecture and Application Co-Design for Beyond-FPGA Reconfigurable Acceleration Devices. IEEE Access 10: 95067-95082 (2022) - [j5]Rui Ma, Evangelos Georganas, Alexander Heinecke, Sergey Gribok, Andrew Boutros, Eriko Nurvitadhi:
FPGA-Based AI Smart NICs for Scalable Distributed AI Training Systems. IEEE Comput. Archit. Lett. 21(2): 49-52 (2022) - [j4]Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk:
Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 227-237 (2022) - [c15]Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz:
RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices. FPL 2022: 438-444 - [i3]Rui Ma, Evangelos Georganas, Alexander Heinecke, Andrew Boutros, Eriko Nurvitadhi:
FPGA-based AI Smart NICs for Scalable Distributed AI Training Systems. CoRR abs/2204.10943 (2022) - 2021
- [c14]Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi R. Iyer, Reetuparna Das:
Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs. FCCM 2021: 88-96 - [c13]Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-sun Seo:
End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression. FPL 2021: 76-82 - [c12]Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John:
Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research. FPL 2021: 355-362 - [c11]Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz:
Specializing for Efficiency: Customizing AI Inference Processors on FPGAs. ICM 2021: 62-65 - [i2]Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John:
Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research. CoRR abs/2106.07087 (2021) - 2020
- [j3]Mohamed Eldafrawy, Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz:
FPGA Logic Block Architectures for Efficient Deep Learning Inference. ACM Trans. Reconfigurable Technol. Syst. 13(3): 12:1-12:34 (2020) - [c10]Andrew Boutros, Eriko Nurvitadhi, Rui Ma, Sergey Gribok, Zhipeng Zhao, James C. Hoe, Vaughn Betz, Martin Langhammer:
Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs. FPT 2020: 10-19 - [c9]Andrew Boutros, Mathew Hall, Nicolas Papernot, Vaughn Betz:
Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs. FPT 2020: 103-111 - [i1]Andrew Boutros, Mathew Hall, Nicolas Papernot, Vaughn Betz:
Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs. CoRR abs/2012.07242 (2020)
2010 – 2019
- 2019
- [c8]Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu:
Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs. FCCM 2019: 199-207 - [c7]Andrew Boutros, Mohamed Eldafrawy, Sadegh Yazdanshenas, Vaughn Betz:
Math Doesn't Have to be Hard: Logic Block Architectures to Enhance Low-Precision Multiply-Accumulate on FPGAs. FPGA 2019: 94-103 - [c6]Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu:
Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI. FPGA 2019: 119 - [c5]Eriko Nurvitadhi, Mishali Naik, Andrew Boutros, Prerna Budhkar, Ali Jafari, Dongup Kwon, David Sheffield, Abirami Prabhakaran, Karthik Gururaj, Pranavi Appana:
Scalable Low-Latency Persistent Neural Machine Translation on CPU Server with Multiple FPGAs. FPT 2019: 307-310 - 2018
- [j2]Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz:
You Cannot Improve What You Do not Measure: FPGA vs. ASIC Efficiency Gaps for Convolutional Neural Network Inference. ACM Trans. Reconfigurable Technol. Syst. 11(3): 20:1-20:23 (2018) - [c4]Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz:
Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs. FPL 2018: 35-42 - 2017
- [j1]Jens Rettkowski, Andrew Boutros, Diana Göhringer:
HW/SW Co-Design of the HOG algorithm on a Xilinx Zynq SoC. J. Parallel Distributed Comput. 109: 50-62 (2017) - [c3]Andrew Boutros, Salma Hesham, Barbara Georgey, Mohamed A. Abd El Ghany:
Hardware acceleration of novel chaos-based image encryption for IoT applications. ICM 2017: 1-4 - [c2]Andrew Boutros, Brett Grady, Mustafa Abbas, Paul Chow:
Build fast, trade fast: FPGA-based high-frequency trading using high-level synthesis. ReConFig 2017: 1-6 - 2015
- [c1]Jens Rettkowski, Andrew Boutros, Diana Göhringer:
Real-time pedestrian detection on a xilinx zynq using the HOG algorithm. ReConFig 2015: 1-8
Coauthor Index
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last updated on 2024-10-22 20:14 CEST by the dblp team
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