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dblp: Srinivasa Banna

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Srinivasa Banna

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2010 – 2019

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2018
[c5]
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  dblp key:
  - conf/isscc/BahrHKBW18
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  - https://dblp.org/rec/conf/isscc/BahrHKBW18
Bichoy Bahr, Yanbo He, Zoran Krivokapic, Srinivasa Banna, Dana Weinstein:
32GHz resonant-fin transistors in 14nm FinFET technology. ISSCC 2018: 348-350
2016
[c4]
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  - conf/iccad/SamalNIBL16
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Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim:
Tier partitioning strategy to mitigate BEOL degradation and cost issues in monolithic 3D ICs. ICCAD 2016: 129
[c3]
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Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim:
How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions. ISLPED 2016: 320-325
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Jiajun Shi, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Csaba Andras Moritz:
On the Design of Ultra-High Density 14nm Finfet Based Transistor-Level Monolithic 3D ICs. ISVLSI 2016: 449-454
2015
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Srinivasa Banna:
Scaling challenges of FinFET technology at advanced nodes and its impact on SoC design (Invited). CICC 2015: 1-8

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