@inproceedings{DBLP:conf/usenix/MaLWHZLZGNZM24,
author = {Teng Ma and
Zheng Liu and
Chengkun Wei and
Jialiang Huang and
Youwei Zhuo and
Haoyu Li and
Ning Zhang and
Yijin Guan and
Dimin Niu and
Mingxing Zhang and
Tao Ma},
editor = {Saurabh Bagchi and
Yiying Zhang},
title = {HydraRPC: {RPC} in the {CXL} Era},
booktitle = {Proceedings of the 2024 {USENIX} Annual Technical Conference, {USENIX}
{ATC} 2024, Santa Clara, CA, USA, July 10-12, 2024},
pages = {387--395},
publisher = {{USENIX} Association},
year = {2024},
url = {https://www.usenix.org/conference/atc24/presentation/ma},
timestamp = {Tue, 16 Jul 2024 16:40:36 +0200},
biburl = {https://dblp.org/rec/conf/usenix/MaLWHZLZGNZM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/HuangZLNGZX22,
author = {Linyong Huang and
Zhe Zhang and
Shuangchen Li and
Dimin Niu and
Yijin Guan and
Hongzhong Zheng and
Yuan Xie},
title = {Practical Near-Data-Processing Architecture for Large-Scale Distributed
Graph Neural Network},
journal = {{IEEE} Access},
volume = {10},
pages = {46796--46807},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3169423},
doi = {10.1109/ACCESS.2022.3169423},
timestamp = {Fri, 02 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/HuangZLNGZX22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/DuGGNZX22,
author = {Zhaoyang Du and
Yijin Guan and
Tianchan Guan and
Dimin Niu and
Hongzhong Zheng and
Yuan Xie},
title = {Accelerating CPU-Based Sparse General Matrix Multiplication With Binary
Row Merging},
journal = {{IEEE} Access},
volume = {10},
pages = {79237--79248},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3193937},
doi = {10.1109/ACCESS.2022.3193937},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/DuGGNZX22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/DuGGNHZX22,
author = {Zhaoyang Du and
Yijin Guan and
Tianchan Guan and
Dimin Niu and
Linyong Huang and
Hongzhong Zheng and
Yuan Xie},
title = {OpSparse: {A} Highly Optimized Framework for Sparse General Matrix
Multiplication on GPUs},
journal = {{IEEE} Access},
volume = {10},
pages = {85960--85974},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3196940},
doi = {10.1109/ACCESS.2022.3196940},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/DuGGNHZX22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiYGSZWN22,
author = {Xingchen Li and
Zhihang Yuan and
Yijin Guan and
Guangyu Sun and
Tao Zhang and
Rongshan Wei and
Dimin Niu},
title = {Flatfish: {A} Reinforcement Learning Approach for Application-Aware
Address Mapping},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {11},
pages = {4758--4770},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2022.3146204},
doi = {10.1109/TCAD.2022.3146204},
timestamp = {Sun, 13 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiYGSZWN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhengLGWCCSH22,
author = {Qilin Zheng and
Xingchen Li and
Yijin Guan and
Zongwei Wang and
Yimao Cai and
Yiran Chen and
Guangyu Sun and
Ru Huang},
title = {PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for
Processing-In-Memory-Based Neural Network Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {12},
pages = {5464--5475},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2022.3160947},
doi = {10.1109/TCAD.2022.3160947},
timestamp = {Tue, 06 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhengLGWCCSH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/DuGGNTYZMYX22,
author = {Zhaoyang Du and
Yijin Guan and
Tianchan Guan and
Dimin Niu and
Nianxiong Tan and
Xiaopeng Yu and
Hongzhong Zheng and
Jianyi Meng and
Xiaolang Yan and
Yuan Xie},
title = {Predicting the Output Structure of Sparse Matrix Multiplication with
Sampled Compression Ratio},
booktitle = {28th {IEEE} International Conference on Parallel and Distributed Systems,
{ICPADS} 2022, Nanjing, China, January 10-12, 2023},
pages = {483--490},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICPADS56603.2022.00069},
doi = {10.1109/ICPADS56603.2022.00069},
timestamp = {Thu, 06 Apr 2023 14:52:40 +0200},
biburl = {https://dblp.org/rec/conf/icpads/DuGGNTYZMYX22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LiNWHZGGLHDXFZX22,
author = {Shuangchen Li and
Dimin Niu and
Yuhao Wang and
Wei Han and
Zhe Zhang and
Tianchan Guan and
Yijin Guan and
Heng Liu and
Linyong Huang and
Zhaoyang Du and
Fei Xue and
Yuanwei Fang and
Hongzhong Zheng and
Yuan Xie},
editor = {Valentina Salapura and
Mohamed Zahran and
Fred Chong and
Lingjia Tang},
title = {Hyperscale FPGA-as-a-service architecture for large-scale distributed
graph neural network},
booktitle = {{ISCA} '22: The 49th Annual International Symposium on Computer Architecture,
New York, New York, USA, June 18 - 22, 2022},
pages = {946--961},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3470496.3527439},
doi = {10.1145/3470496.3527439},
timestamp = {Thu, 15 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/LiNWHZGGLHDXFZX22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/NiuLWHZGGSXDFZJ22,
author = {Dimin Niu and
Shuangchen Li and
Yuhao Wang and
Wei Han and
Zhe Zhang and
Yijin Guan and
Tianchan Guan and
Fei Sun and
Fei Xue and
Lide Duan and
Yuanwei Fang and
Hongzhong Zheng and
Xiping Jiang and
Song Wang and
Fengguo Zuo and
Yubing Wang and
Bing Yu and
Qiwei Ren and
Yuan Xie},
title = {184QPS/W 64Mb/mm\({}^{\mbox{2}}\)3D Logic-to-DRAM Hybrid Bonding with
Process-Near-Memory Engine for Recommendation System},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
San Francisco, CA, USA, February 20-26, 2022},
pages = {1--3},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731694},
doi = {10.1109/ISSCC42614.2022.9731694},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/NiuLWHZGGSXDFZJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2206-06611,
author = {Zhaoyang Du and
Yijin Guan and
Tianchan Guan and
Dimin Niu and
Hongzhong Zheng and
Yuan Xie},
title = {Accelerating CPU-based Sparse General Matrix Multiplication with Binary
Row Merging},
journal = {CoRR},
volume = {abs/2206.06611},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2206.06611},
doi = {10.48550/ARXIV.2206.06611},
eprinttype = {arXiv},
eprint = {2206.06611},
timestamp = {Tue, 21 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2206-06611.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2206-07244,
author = {Zhaoyang Du and
Yijin Guan and
Tianchan Guan and
Dimin Niu and
Linyong Huang and
Hongzhong Zheng and
Yuan Xie},
title = {OpSparse: a Highly Optimized Framework for Sparse General Matrix Multiplication
on GPUs},
journal = {CoRR},
volume = {abs/2206.07244},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2206.07244},
doi = {10.48550/ARXIV.2206.07244},
eprinttype = {arXiv},
eprint = {2206.07244},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2206-07244.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2207-13848,
author = {Zhaoyang Du and
Yijin Guan and
Tianchan Guan and
Dimin Niu and
Nianxiong Tan and
Xiaopeng Yu and
Hongzhong Zheng and
Jianyi Meng and
Xiaolang Yan and
Yuan Xie},
title = {Predicting the Output Structure of Sparse Matrix Multiplication with
Sampled Compression Ratio},
journal = {CoRR},
volume = {abs/2207.13848},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2207.13848},
doi = {10.48550/ARXIV.2207.13848},
eprinttype = {arXiv},
eprint = {2207.13848},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2207-13848.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ZhouSZG0L21,
author = {Zhe Zhou and
Bizhao Shi and
Zhe Zhang and
Yijin Guan and
Guangyu Sun and
Guojie Luo},
title = {BlockGNN: Towards Efficient {GNN} Acceleration Using Block-Circulant
Weight Matrices},
booktitle = {58th {ACM/IEEE} Design Automation Conference, {DAC} 2021, San Francisco,
CA, USA, December 5-9, 2021},
pages = {1009--1014},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DAC18074.2021.9586181},
doi = {10.1109/DAC18074.2021.9586181},
timestamp = {Mon, 17 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/ZhouSZG0L21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2104-06214,
author = {Zhe Zhou and
Bizhao Shi and
Zhe Zhang and
Yijin Guan and
Guangyu Sun and
Guojie Luo},
title = {BlockGNN: Towards Efficient {GNN} Acceleration Using Block-Circulant
Weight Matrices},
journal = {CoRR},
volume = {abs/2104.06214},
year = {2021},
url = {https://arxiv.org/abs/2104.06214},
eprinttype = {arXiv},
eprint = {2104.06214},
timestamp = {Mon, 17 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2104-06214.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GuanSYLXCCX20,
author = {Yijin Guan and
Guangyu Sun and
Zhihang Yuan and
Xingchen Li and
Ningyi Xu and
Shu Chen and
Jason Cong and
Yuan Xie},
title = {Crane: Mitigating Accelerator Under-utilization Caused by Sparsity
Irregularities in CNNs},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {7},
pages = {931--943},
year = {2020},
url = {https://doi.org/10.1109/TC.2020.2981080},
doi = {10.1109/TC.2020.2981080},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GuanSYLXCCX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aca/WangGSNWZH20,
author = {Zhao Wang and
Yijin Guan and
Guangyu Sun and
Dimin Niu and
Yuhao Wang and
Hongzhong Zheng and
Yinhe Han},
editor = {Dezun Dong and
Xiaoli Gong and
Cunlu Li and
Dongsheng Li and
Junjie Wu},
title = {{GNN-PIM:} {A} Processing-in-Memory Architecture for Graph Neural
Networks},
booktitle = {Advanced Computer Architecture - 13th Conference, {ACA} 2020, Kunming,
China, August 13-15, 2020, Proceedings},
series = {Communications in Computer and Information Science},
volume = {1256},
pages = {73--86},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-981-15-8135-9\_6},
doi = {10.1007/978-981-15-8135-9\_6},
timestamp = {Wed, 24 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aca/WangGSNWZH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/appt/GuanXZYC17,
author = {Yijin Guan and
Ningyi Xu and
Chen Zhang and
Zhihang Yuan and
Jason Cong},
editor = {Yong Dou and
Haixiang Lin and
Guangyu Sun and
Junjie Wu and
Dora Heras and
Luc Boug{\'{e}}},
title = {Using Data Compression for Optimizing FPGA-Based Convolutional Neural
Network Accelerators},
booktitle = {Advanced Parallel Processing Technologies - 12th International Symposium,
{APPT} 2017, Santiago de Compostela, Spain, August 29, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10561},
pages = {14--26},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-67952-5\_2},
doi = {10.1007/978-3-319-67952-5\_2},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/appt/GuanXZYC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GuanYSC17,
author = {Yijin Guan and
Zhihang Yuan and
Guangyu Sun and
Jason Cong},
title = {FPGA-based accelerator for long short-term memory recurrent neural
networks},
booktitle = {22nd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2017, Chiba, Japan, January 16-19, 2017},
pages = {629--634},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASPDAC.2017.7858394},
doi = {10.1109/ASPDAC.2017.7858394},
timestamp = {Fri, 27 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/GuanYSC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/GuanLXWSCSZC17,
author = {Yijin Guan and
Hao Liang and
Ningyi Xu and
Wenqiang Wang and
Shaoshuai Shi and
Xi Chen and
Guangyu Sun and
Wei Zhang and
Jason Cong},
title = {{FP-DNN:} An Automated Framework for Mapping Deep Neural Networks
onto FPGAs with {RTL-HLS} Hybrid Templates},
booktitle = {25th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2017, Napa, CA, USA, April 30 - May 2,
2017},
pages = {152--159},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/FCCM.2017.25},
doi = {10.1109/FCCM.2017.25},
timestamp = {Fri, 19 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fccm/GuanLXWSCSZC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhangLSGXC15,
author = {Chen Zhang and
Peng Li and
Guangyu Sun and
Yijin Guan and
Bingjun Xiao and
Jason Cong},
editor = {George A. Constantinides and
Deming Chen},
title = {Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural
Networks},
booktitle = {Proceedings of the 2015 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Monterey, CA, USA, February 22-24, 2015},
pages = {161--170},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2684746.2689060},
doi = {10.1145/2684746.2689060},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/ZhangLSGXC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
