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2020 – today
- 2024
[j10]Giacomo Valente
, Vittoriano Muttillo, Fabio Federici, Luigi Pomante, Tania Di Mascio:
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection. IEEE Embed. Syst. Lett. 16(2): 162-165 (2024)- [j9]Johan Cederbladh, Romina Eramo, Vittoriano Muttillo, Per Erik Strandberg:
Experiences and challenges from developing cyber-physical systems in industry-academia collaboration. Softw. Pract. Exp. 54(6): 1193-1212 (2024) - [i1]Vittoriano Muttillo, Claudio Di Sipio, Riccardo Rubei, Luca Berardinelli, MohammadHadi Dehghani:
Towards Synthetic Trace Generation of Modeling Operations using In-Context Learning Approach. CoRR abs/2408.14259 (2024) - 2023
- [j8]Vittoriano Muttillo, Luigi Pomante, Marco Santic, Giacomo Valente:
SystemC-based Co-Simulation/Analysis for System-Level Hardware/Software Co-Design. Comput. Electr. Eng. 110: 108803 (2023) - 2022
- [j7]Hugo Bruneliere, Vittoriano Muttillo, Romina Eramo, Luca Berardinelli, Abel Gómez, Alessandra Bagnato, Andrey Sadovykh, Antonio Cicchetti:
AIDOaRt: AI-augmented Automation for DevOps, a model-based framework for continuous development in Cyber-Physical Systems. Microprocess. Microsystems 94: 104672 (2022) - 2021
- [c22]Romina Eramo, Vittoriano Muttillo, Luca Berardinelli, Hugo Bruneliere, Abel Gómez, Alessandra Bagnato, Andrey Sadovykh, Antonio Cicchetti:
AIDOaRt: AI-augmented Automation for DevOps, a Model-based Framework for Continuous Development in Cyber-Physical Systems. DSD 2021: 303-310 - [c21]Vittoriano Muttillo, Vincenzo Stoico:
Model-Based HW/SW Co-Design Methodology for UAV Systems Development. MECO 2021: 1-6 - [c20]Vittoriano Muttillo, Paolo Giammatteo, Vincenzo Stoico:
Statement-Level Timing Estimation for Embedded System Design Using Machine Learning Techniques. ICPE 2021: 257-264 - 2020
- [j6]Luigi Pomante, Vittoriano Muttillo, Marco Santic, Paolo Serri:
SystemC-based electronic system-level design space exploration environment for dedicated heterogeneous multi-processor systems. Microprocess. Microsystems 72 (2020) - [j5]Vittoriano Muttillo, Paolo Giammatteo, Vincenzo Stoico, Luigi Pomante:
An early-stage statement-level metric for energy characterization of embedded processors. Microprocess. Microsystems 77: 103200 (2020) - [c19]Vittoriano Muttillo, Giacomo Valente, Luigi Pomante, Hector Posadas, Javier Merino, Eugenio Villar:
Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow. DSD 2020: 117-125 - [c18]Vittoriano Muttillo, Paolo Giammatteo, Giuseppe Fiorilli, Luigi Pomante:
An OpenMP Parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-processor Embedded Systems. PARMA-DITAM@HiPEAC 2020: 4:1-4:6 - [c17]Mirco Muttillo, Vittoriano Muttillo, Luigi Pomante, Leonardo Pantoli:
A Low Cost and Flexible Power Line Communication Sensory System for Home Automation. MetroInd4.0&IoT 2020: 191-196 - [c16]Mirco Muttillo, Vittoriano Muttillo, Tullio de Rubeis:
Towards the Design of Microcontroller Based Embedded Sensory systems with a Five-Parameter Single Diode Estimation Method for Photovoltaic Panels. MetroInd4.0&IoT 2020: 197-201
2010 – 2019
- 2019
- [b1]Vittoriano Muttillo:
HW/SW co-design methodology and framework for mixed-criticality and real-time embedded systems. University of L'Aquila, Italy, 2019 - [j4]Vittoriano Muttillo, Luca Tiberi, Luigi Pomante, Paolo Serri:
Benchmarking Analysis and Characterization of Hypervisors for Space Multicore Systems. J. Aerosp. Inf. Syst. 16(11): 500-511 (2019) - [j3]Luigi Pomante, Vittoriano Muttillo, Bohuslav Krena, Tomás Vojnar, Filip Veljkovic, Pacome Magnin, Martin Matschnig, Bernhard Fischer, Jabier Martinez, Thomas Gruber:
The AQUAS ECSEL Project Aggregated Quality Assurance for Systems: Co-Engineering Inside and Across the Product Life Cycle. Microprocess. Microsystems 69: 54-67 (2019) - [c15]Vittoriano Muttillo, Luigi Pomante, Patricia Balbastre, José E. Simó, Alfons Crespo:
HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions. DSD 2019: 554-561 - [c14]Vittoriano Muttillo:
J4CS: An Early-Stage Statement-Level Metric for Energy Consumption of Embedded SW. MECO 2019: 1-5 - 2018
- [c13]Vittoriano Muttillo, Giacomo Valente, Luigi Pomante:
Design Space Exploration for Mixed-Criticality Embedded Systems Considering Hypervisor-Based SW Partitions. DSD 2018: 740-744 - [c12]Vittoriano Muttillo, Giacomo Valente, Luigi Pomante:
Criticality-driven Design Space Exploration for Mixed-Criticality Heterogeneous Parallel Embedded Systems. PARMA-DITAM@HiPEAC 2018: 63-68 - [c11]Daniele Ciambrone, Vittoriano Muttillo, Luigi Pomante, Giacomo Valente:
HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems. MECO 2018: 1-6 - [c10]Vittoriano Muttillo, Giacomo Valente:
Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements. MECO 2018: 1-5 - [c9]Vittoriano Muttillo, Giacomo Valente, Daniele Ciambrone, Vincenzo Stoico, Luigi Pomante:
HEPSYCODE-RT: a Real-Time Extension for an ESL HW/SW Co-Design Methodology. RAPIDO 2018: 6:1-6:6 - [c8]Vittoriano Muttillo, Giacomo Valente, Luigi Pomante:
Criticality-aware Design Space Exploration for Mixed-Criticality Embedded Systems. ICPE Companion 2018: 45-46 - [c7]Vittoriano Muttillo, Giacomo Valente, Luigi Pomante, Vincenzo Stoico, Fausto D'Antonio, Fabio Salice:
CC4CS: an Off-the-Shelf Unifying Statement-Level Performance Metric for HW/SW Technologies. ICPE Companion 2018: 119-122 - 2017
- [c6]Fabio Federici, Mattia Micozzi, Vittoriano Muttillo, Luigi Pomante, Giacomo Valente:
Simulation-Based Analysis of a Hardware Mechanism to Support Isolation in Mixed-Criticality Network on Chip. EMS 2017: 185-190 - [c5]Giacomo Valente, Marco Rotondi, Vittoriano Muttillo:
Time Bands: A Software Approach for Timing Analysis on Resource Constrained Systems. ICPE 2017: 161-162 - [c4]Daniele Di Pompeo, Emilio Incerto, Vittoriano Muttillo, Luigi Pomante, Giacomo Valente:
An Efficient Performance-Driven Approach for HW/SW Co-Design. ICPE 2017: 323-326 - 2016
- [j2]Vittoriano Muttillo, Giacomo Valente, Fabio Federici, Luigi Pomante, Marco Faccio, Carlo Tieri, Serenella Ferri:
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system. EURASIP J. Embed. Syst. 2016: 15 (2016) - [c3]Giacomo Valente, Vittoriano Muttillo, Luigi Pomante, Fabio Federici, Marco Faccio, Andrea Moro, Serenella Ferri, Carlo Tieri:
A Flexible Profiling Sub-System for Reconfigurable Logic Architectures. PDP 2016: 373-376 - [c2]Marco Faccio, Fabio Federici, Giuseppe Marini, Vittoriano Muttillo, Luigi Pomante, Giacomo Valente:
Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints. RTSI 2016: 1 - 2015
- [c1]Andrea Moro, Fabio Federici, Giacomo Valente, Luigi Pomante, Marco Faccio, Vittoriano Muttillo:
Hardware performance sniffers for embedded systems profiling. WISES 2015: 29-34 - 2014
- [j1]Paolino Di Felice, Luca Finocchio, Daniele Leombruni, Vittoriano Muttillo:
A Proposal to Expand the Community of Users Able to Process Historical Rainfall Data by Means of the Today Available Open Source Libraries. J. Comput. Inf. Technol. 22(2): 85-103 (2014)
Coauthor Index
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last updated on 2024-09-30 00:08 CEST by the dblp team
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