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ORCIDJongkil Park
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2020 – today
- 2024
[j9]Dongyeon Woo
, Gichang Noh, Eunpyo Park, Min Jee Kim, Dae Kyu Lee, Yong Woo Sung, Jaewook Kim, Yeonjoo Jeong, Jongkil Park, Seongsik Park, Hyun Jae Jang, Nakwon Choi, Yooyeon Jo, Joon Young Kwak:
Implementation of two-step gradual reset scheme for enhancing state uniformity of 2D hBN-based memristors for image processing. Neuromorph. Comput. Eng. 4(3): 34001 (2024)- [c14]Jongkil Park, YeonJoo Jeong, Jaewook Kim, Suyoun Lee, Joon Young Kwak, Jong-Keuk Park, Inho Kim:
High-Density Digital Neuromorphic Processor with High-Precision Neural and Synaptic Dynamics and Temporal Acceleration. AICAS 2024: 322-326 - [i2]Dayena Jeong, Jaewoo Park, Jeonghee Jo, Jongkil Park, Jaewook Kim, Hyun Jae Jang, Suyoun Lee, Seongsik Park:
A More Accurate Approximation of Activation Function with Few Spikes Neurons. CoRR abs/2409.00044 (2024) - 2023
- [j8]Geunbo Yang, Wongyu Lee, Youjung Seo, Choongseop Lee, Woojoon Seok, Jongkil Park, Donggyu Sim, Cheolsoo Park:
Unsupervised Spiking Neural Network with Dynamic Learning of Inhibitory Neurons. Sensors 23(16): 7232 (2023) - [j7]Jongkil Park, YeonJoo Jeong, Jaewook Kim, Suyoun Lee, Joon Young Kwak, Jong-Keuk Park, Inho Kim:
High Dynamic Range Digital Neuron Core With Time-Embedded Floating-Point Arithmetic. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 290-301 (2023) - [j6]Young-Mok Ha, Eunji Pak, Jongkil Park, Taeho Kim, Ji Won Yoon:
Clock Offset Estimation for Systems With Asymmetric Packet Delays. IEEE/ACM Trans. Netw. 31(4): 1838-1853 (2023) - [c13]Daeyoung Kim, Jihyeok Choi, Mingyu Cheon, YeonJoo Jeong, Jaewook Kim, Joon Young Kwak, Jong-Keuk Park, Suyoun Lee, Inho Kim, Jongkil Park:
Real-time Neural Connectivity Inference with Presynaptic Spike-driven Spike Timing-Dependent Plasticity. EMBC 2023: 1-4 - [i1]Seongsik Park, Jeonghee Jo, Jongkil Park, Yeonjoo Jeong, Jaewook Kim, Suyoun Lee, Joon Young Kwak, Inho Kim, Jong-Keuk Park, Kyeong Seok Lee, Gye Weon Hwang, Hyun Jae Jang:
Gradient Scaling on Deep Spiking Neural Networks with Spike-Dependent Local Information. CoRR abs/2308.00558 (2023) - 2022
- [j5]Suman Hu, Jaehyun Kang, Taeyoon Kim, Suyoun Lee, Jong-Keuk Park, Inho Kim, Jaewook Kim, Joon Young Kwak, Jongkil Park, Gyu-Tae Kim, Shinhyun Choi, YeonJoo Jeong:
SPICE Study of STDP Characteristics in a Drift and Diffusive Memristor-Based Synapse for Neuromorphic Computing. IEEE Access 10: 6381-6392 (2022) - 2021
- [j4]Taeyoon Kim, Suman Hu, Jaewook Kim, Joon Young Kwak, Jongkil Park, Suyoun Lee, Inho Kim, Jong-Keuk Park, YeonJoo Jeong:
Spiking Neural Network (SNN) With Memristor Synapses Having Non-linear Weight Update. Frontiers Comput. Neurosci. 15: 646125 (2021) - 2020
- [j3]Jongkil Park, Sang-Don Jung:
Presynaptic Spike-Driven Spike Timing-Dependent Plasticity With Address Event Representation for Large-Scale Neuromorphic Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 1936-1947 (2020) - [c12]Rajkumar Kubendran, Jongkil Park, Ritvik Sharma, Chul Kim, Siddharth Joshi, Gert Cauwenberghs, Sohmyung Ha:
A 4.2-pJ/Conv 10-b Asynchronous ADC with Hybrid Two-Tier Level-Crossing Event Coding. ISCAS 2020: 1-5
2010 – 2019
- 2017
- [j2]Jongkil Park, Theodore Yu, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs:
Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems. IEEE Trans. Neural Networks Learn. Syst. 28(10): 2408-2422 (2017) - [c11]Jongkil Park, Yong Hee Kim, Sang-Don Jung:
Event-based delay-controlled stimulator controller with priority queue for real-time closed-loop neural interface system. BioCAS 2017: 1-4 - 2016
- [j1]Sohmyung Ha, Chul Kim, Jongkil Park, Siddharth Joshi, Gert Cauwenberghs:
Energy Recycling Telemetry IC With Simultaneous 11.5 mW Power and 6.78 Mb/s Backward Data Delivery Over a Single 13.56 MHz Inductive Link. IEEE J. Solid State Circuits 51(11): 2664-2678 (2016) - 2015
- [c10]Sohmyung Ha, Abraham Akinin, Jongkil Park, Chul Kim, Hui Wang, Christoph Maier, Gert Cauwenberghs, Patrick P. Mercier:
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation. VLSIC 2015: 106- - 2014
- [b1]Jongkil Park:
Large Scale Asynchronous Low-power VLSI Systems for Event- driven Sensory and Neural Processing. University of California, San Diego, USA, 2014 - [c9]Jongkil Park, Sohmyung Ha, Chul Kim, Siddharth Joshi, Theodore Yu, Wei Ma, Gert Cauwenberghs:
A 12.6 mW 8.3 Mevents/s contrast detection 128×128 imager with 75 dB intra-scene DR asynchronous random-access digital readout. BioCAS 2014: 564-567 - [c8]Jongkil Park, Sohmyung Ha, Theodore Yu, Emre Neftci, Gert Cauwenberghs:
A 65k-neuron 73-Mevents/s 22-pJ/event asynchronous micro-pipelined integrate-and-fire array transceiver. BioCAS 2014: 675-678 - [c7]Chul Kim, Sohmyung Ha, Chris M. Thomas, Siddharth Joshi, Jongkil Park, Lawrence E. Larson, Gert Cauwenberghs:
A 7.86 mW +12.5 dBm in-band IIP3 8-to-320 MHz capacitive harmonic rejection mixer in 65nm CMOS. ESSCIRC 2014: 227-230 - [c6]Sohmyung Ha, Chul Kim, Jongkil Park, Siddharth Joshi, Gert Cauwenberghs:
Energy-recycling integrated 6.78-Mbps data 6.3-mW power telemetry over a single 13.56-MHz inductive link. VLSIC 2014: 1-2 - 2013
- [c5]Sohmyung Ha, Jongkil Park, Yu M. Chi, Jonathan Viventi, John A. Rogers, Gert Cauwenberghs:
85 dB dynamic range 1.2 mW 156 kS/s biopotential recording IC for high-density ECoG flexible active electrode array. ESSCIRC 2013: 141-144 - [c4]Teresa Serrano-Gotarredona, Jongkil Park, Alejandro Linares-Barranco, Angel Jiménez-Fernandez, Ryad Benosman, Bernabé Linares-Barranco:
Improved contrast sensitivity DVS and its application to event-driven stereo vision. ISCAS 2013: 2420-2423 - 2012
- [c3]Theodore Yu, Jongkil Park, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs:
65k-neuron integrate-and-fire array transceiver with address-event reconfigurable synaptic routing. BioCAS 2012: 21-24 - [c2]Theodore Yu, Jongkil Park, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs:
Event-driven neural integration and synchronicity in analog VLSI. EMBC 2012: 775-778 - [c1]Jongkil Park, Theodore Yu, Christoph Maier, Siddharth Joshi, Gert Cauwenberghs:
Live demonstration: Hierarchical Address-Event Routing architecture for reconfigurable large scale neuromorphic systems. ISCAS 2012: 707-711
Coauthor Index
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last updated on 2024-10-21 20:31 CEST by the dblp team
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