iBet uBet web content aggregator. Adding the entire web to your favor.
iBet uBet web content aggregator. Adding the entire web to your favor.



Link to original content: https://dblp.org/pid/02/8105.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - JOUR ID - DBLP:journals/cal/KimLR24 AU - Kim, Hyeseong AU - Lee, Yunjae AU - Rhu, Minsoo TI - FPGA-Accelerated Data Preprocessing for Personalized Recommendation Systems. JO - IEEE Comput. Archit. Lett. VL - 23 IS - 1 SP - 7 EP - 10 PY - 2024// DO - 10.1109/LCA.2023.3336841 UR - https://doi.org/10.1109/LCA.2023.3336841 ER - TY - JOUR ID - DBLP:journals/cal/YoonKLR24 AU - Yoon, Dongho AU - Kim, Taehun AU - Lee, Jae W. AU - Rhu, Minsoo TI - A Quantitative Analysis of State Space Model-Based Large Language Model: Study of Hungry Hungry Hippos. JO - IEEE Comput. Archit. Lett. VL - 23 IS - 2 SP - 154 EP - 157 PY - 2024// DO - 10.1109/LCA.2024.3422492 UR - https://doi.org/10.1109/LCA.2024.3422492 ER - TY - JOUR ID - DBLP:journals/cal/ChoBR24 AU - Cho, Eunyeong AU - Bang, Jehyeon AU - Rhu, Minsoo TI - Characterization and Analysis of Text-to-Image Diffusion Models. JO - IEEE Comput. Archit. Lett. VL - 23 IS - 2 SP - 227 EP - 230 PY - 2024// DO - 10.1109/LCA.2024.3466118 UR - https://doi.org/10.1109/LCA.2024.3466118 ER - TY - CPAPER ID - DBLP:conf/asplos/LamJ0MGLLLRLRW024 AU - Lam, Maximilian AU - Johnson, Jeff AU - Xiong, Wenjie AU - Maeng, Kiwan AU - Gupta, Udit AU - Li, Yang AU - Lai, Liangzhen AU - Leontiadis, Ilias AU - Rhu, Minsoo AU - Lee, Hsien-Hsin S. AU - Reddi, Vijay Janapa AU - Wei, Gu-Yeon AU - Brooks, David AU - Suh, G. Edward TI - GPU-based Private Information Retrieval for On-Device Machine Learning Inference. BT - Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024 SP - 197 EP - 214 PY - 2024// DO - 10.1145/3617232.3624855 UR - https://doi.org/10.1145/3617232.3624855 ER - TY - CPAPER ID - DBLP:conf/asplos/LimKHMSR24 AU - Lim, Juntaek AU - Kwon, Youngeun AU - Hwang, Ranggi AU - Maeng, Kiwan AU - Suh, G. Edward AU - Rhu, Minsoo TI - LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models. BT - Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024 SP - 616 EP - 630 PY - 2024// DO - 10.1145/3620665.3640384 UR - https://doi.org/10.1145/3620665.3640384 ER - TY - CPAPER ID - DBLP:conf/hpca/HyunKLR24 AU - Hyun, Bongjoon AU - Kim, Taehun AU - Lee, Dongjae AU - Rhu, Minsoo TI - Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology. BT - IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024 SP - 263 EP - 279 PY - 2024// DO - 10.1109/HPCA57654.2024.00029 UR - https://doi.org/10.1109/HPCA57654.2024.00029 ER - TY - CPAPER ID - DBLP:conf/isca/LeeKR24 AU - Lee, Yunjae AU - Kim, Hyeseong AU - Rhu, Minsoo TI - PreSto: An In-Storage Data Preprocessing System for Training Recommendation Models. BT - 51st ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2024, Buenos Aires, Argentina, June 29 - July 3, 2024 SP - 340 EP - 353 PY - 2024// DO - 10.1109/ISCA59077.2024.00033 UR - https://doi.org/10.1109/ISCA59077.2024.00033 ER - TY - CPAPER ID - DBLP:conf/isca/ChoiKR24 AU - Choi, Yujeong AU - Kim, Jiin AU - Rhu, Minsoo TI - ElasticRec: A Microservice-based Model Serving Architecture Enabling Elastic Resource Scaling for Recommendation Models. BT - 51st ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2024, Buenos Aires, Argentina, June 29 - July 3, 2024 SP - 410 EP - 423 PY - 2024// DO - 10.1109/ISCA59077.2024.00038 UR - https://doi.org/10.1109/ISCA59077.2024.00038 ER - TY - CPAPER ID - DBLP:conf/micro/BangCKKR24 AU - Bang, Jehyeon AU - Choi, Yujeong AU - Kim, Myeongwoo AU - Kim, Yongdeok AU - Rhu, Minsoo TI - vTrain: A Simulation Framework for Evaluating Cost-Effective and Compute-Optimal Large Language Model Training. BT - 57th IEEE/ACM International Symposium on Microarchitecture, MICRO 2024, Austin, TX, USA, November 2-6, 2024 SP - 153 EP - 167 PY - 2024// DO - 10.1109/MICRO61859.2024.00021 UR - https://doi.org/10.1109/MICRO61859.2024.00021 ER - TY - CPAPER ID - DBLP:conf/micro/LeeHKR24 AU - Lee, Dongjae AU - Hyun, Bongjoon AU - Kim, Taehun AU - Rhu, Minsoo TI - PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems. BT - 57th IEEE/ACM International Symposium on Microarchitecture, MICRO 2024, Austin, TX, USA, November 2-6, 2024 SP - 627 EP - 642 PY - 2024// DO - 10.1109/MICRO61859.2024.00053 UR - https://doi.org/10.1109/MICRO61859.2024.00053 ER - TY - CPAPER ID - DBLP:conf/micro/JinRKKRBA024 AU - Jin, Zhixian AU - Rocca, Christopher AU - Kim, Jiho AU - Kasan, Hans AU - Rhu, Minsoo AU - Bakhoda, Ali AU - Aamodt, Tor M. AU - Kim, John TI - Uncovering Real GPU NoC Characteristics: Implications on Interconnect Architecture. BT - 57th IEEE/ACM International Symposium on Microarchitecture, MICRO 2024, Austin, TX, USA, November 2-6, 2024 SP - 885 EP - 898 PY - 2024// DO - 10.1109/MICRO61859.2024.00070 UR - https://doi.org/10.1109/MICRO61859.2024.00070 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2404-08847 AU - Lim, Juntaek AU - Kwon, Youngeun AU - Hwang, Ranggi AU - Maeng, Kiwan AU - Suh, G. Edward AU - Rhu, Minsoo TI - LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models. JO - CoRR VL - abs/2404.08847 PY - 2024// DO - 10.48550/ARXIV.2404.08847 UR - https://doi.org/10.48550/arXiv.2404.08847 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2406-06955 AU - Choi, Yujeong AU - Kim, Jiin AU - Rhu, Minsoo TI - ElasticRec: A Microservice-based Model Serving Architecture Enabling Elastic Resource Scaling for Recommendation Models. JO - CoRR VL - abs/2406.06955 PY - 2024// DO - 10.48550/ARXIV.2406.06955 UR - https://doi.org/10.48550/arXiv.2406.06955 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2406-14571 AU - Lee, Yunjae AU - Kim, Hyeseong AU - Rhu, Minsoo TI - PreSto: An In-Storage Data Preprocessing System for Training Recommendation Models. JO - CoRR VL - abs/2406.14571 PY - 2024// DO - 10.48550/ARXIV.2406.14571 UR - https://doi.org/10.48550/arXiv.2406.14571 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2409-06204 AU - Lee, Dongjae AU - Hyun, Bongjoon AU - Kim, Taehun AU - Rhu, Minsoo TI - PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems. JO - CoRR VL - abs/2409.06204 PY - 2024// DO - 10.48550/ARXIV.2409.06204 UR - https://doi.org/10.48550/arXiv.2409.06204 ER - TY - JOUR ID - DBLP:journals/cal/LeeHPR23 AU - Lee, Seonho AU - Hwang, Ranggi AU - Park, Jongse AU - Rhu, Minsoo TI - HAMMER: Hardware-Friendly Approximate Computing for Self-Attention With Mean-Redistribution And Linearization. JO - IEEE Comput. Archit. Lett. VL - 22 IS - 1 SP - 13 EP - 16 PY - 2023// DO - 10.1109/LCA.2022.3233832 UR - https://doi.org/10.1109/LCA.2022.3233832 ER - TY - CPAPER ID - DBLP:conf/hpca/HwangKLKLR23 AU - Hwang, Ranggi AU - Kang, Minhoo AU - Lee, Jiwon AU - Kam, Dongyun AU - Lee, Youngjoo AU - Rhu, Minsoo TI - GROW: A Row-Stationary Sparse-Dense GEMM Accelerator for Memory-Efficient Graph Convolutional Neural Networks. BT - IEEE International Symposium on High-Performance Computer Architecture, HPCA 2023, Montreal, QC, Canada, February 25 - March 1, 2023 SP - 42 EP - 55 PY - 2023// DO - 10.1109/HPCA56546.2023.10070983 UR - https://doi.org/10.1109/HPCA56546.2023.10070983 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2301-10904 AU - Lam, Maximilian AU - Johnson, Jeff AU - Xiong, Wenjie AU - Maeng, Kiwan AU - Gupta, Udit AU - Li, Yang AU - Lai, Liangzhen AU - Leontiadis, Ilias AU - Rhu, Minsoo AU - Lee, Hsien-Hsin S. AU - Reddi, Vijay Janapa AU - Wei, Gu-Yeon AU - Brooks, David AU - Suh, G. Edward TI - GPU-based Private Information Retrieval for On-Device Machine Learning Inference. JO - CoRR VL - abs/2301.10904 PY - 2023// DO - 10.48550/ARXIV.2301.10904 UR - https://doi.org/10.48550/arXiv.2301.10904 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2302-11750 AU - Choi, Yujeong AU - Kim, John AU - Rhu, Minsoo TI - Hera: A Heterogeneity-Aware Multi-Tenant Inference Server for Personalized Recommendations. JO - CoRR VL - abs/2302.11750 PY - 2023// DO - 10.48550/ARXIV.2302.11750 UR - https://doi.org/10.48550/arXiv.2302.11750 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2308-00846 AU - Hyun, Bongjoon AU - Kim, Taehun AU - Lee, Dongjae AU - Rhu, Minsoo TI - Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology. JO - CoRR VL - abs/2308.00846 PY - 2023// DO - 10.48550/ARXIV.2308.00846 UR - https://doi.org/10.48550/arXiv.2308.00846 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2308-12066 AU - Hwang, Ranggi AU - Wei, Jianyu AU - Cao, Shijie AU - Hwang, Changho AU - Tang, Xiaohu AU - Cao, Ting AU - Yang, Mao AU - Rhu, Minsoo TI - Pre-gated MoE: An Algorithm-System Co-Design for Fast and Scalable Mixture-of-Expert Inference. JO - CoRR VL - abs/2308.12066 PY - 2023// DO - 10.48550/ARXIV.2308.12066 UR - https://doi.org/10.48550/arXiv.2308.12066 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2312-12391 AU - Bang, Jehyeon AU - Choi, Yujeong AU - Kim, Myeongwoo AU - Kim, Yongdeok AU - Rhu, Minsoo TI - vTrain: A Simulation Framework for Evaluating Cost-effective and Compute-optimal Large Language Model Training. JO - CoRR VL - abs/2312.12391 PY - 2023// DO - 10.48550/ARXIV.2312.12391 UR - https://doi.org/10.48550/arXiv.2312.12391 ER - TY - CPAPER ID - DBLP:conf/dac/KimCR22 AU - Kim, Yunseong AU - Choi, Yujeong AU - Rhu, Minsoo TI - PARIS and ELSA: an elastic scheduling algorithm for reconfigurable multi-GPU inference servers. BT - DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022 SP - 607 EP - 612 PY - 2022// DO - 10.1145/3489517.3530510 UR - https://doi.org/10.1145/3489517.3530510 ER - TY - CPAPER ID - DBLP:conf/isca/KimKKJKRA22 AU - Kim, Sangpyo AU - Kim, Jongmin AU - Kim, Michael Jaemin AU - Jung, Wonkyung AU - Kim, John AU - Rhu, Minsoo AU - Ahn, Jung Ho TI - BTS: an accelerator for bootstrappable fully homomorphic encryption. BT - ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022 SP - 711 EP - 725 PY - 2022// DO - 10.1145/3470496.3527415 UR - https://doi.org/10.1145/3470496.3527415 ER - TY - CPAPER ID - DBLP:conf/isca/KwonR22 AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Training personalized recommendation systems from (GPU) scratch: look forward not backwards. BT - ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022 SP - 860 EP - 873 PY - 2022// DO - 10.1145/3470496.3527386 UR - https://doi.org/10.1145/3470496.3527386 ER - TY - CPAPER ID - DBLP:conf/isca/LeeCR22 AU - Lee, Yunjae AU - Chung, Jinha AU - Rhu, Minsoo TI - SmartSAGE: training large-scale graph neural networks using in-storage processing architectures. BT - ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022 SP - 932 EP - 945 PY - 2022// DO - 10.1145/3470496.3527391 UR - https://doi.org/10.1145/3470496.3527391 ER - TY - CPAPER ID - DBLP:conf/micro/ParkHYCR22 AU - Park, Beomsik AU - Hwang, Ranggi AU - Yoon, Dongho AU - Choi, Yoonhyuk AU - Rhu, Minsoo TI - DiVa: An Accelerator for Differentially Private Machine Learning. BT - 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, Chicago, IL, USA, October 1-5, 2022 SP - 1200 EP - 1217 PY - 2022// DO - 10.1109/MICRO56248.2022.00084 UR - https://doi.org/10.1109/MICRO56248.2022.00084 ER - TY - CPAPER ID - DBLP:conf/micro/KimLKSRKA22 AU - Kim, Jongmin AU - Lee, Gwangho AU - Kim, Sangpyo AU - Sohn, Gina AU - Rhu, Minsoo AU - Kim, John AU - Ahn, Jung Ho TI - ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. BT - 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, Chicago, IL, USA, October 1-5, 2022 SP - 1237 EP - 1254 PY - 2022// DO - 10.1109/MICRO56248.2022.00086 UR - https://doi.org/10.1109/MICRO56248.2022.00086 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2202-13481 AU - Kim, Yunseong AU - Choi, Yujeong AU - Rhu, Minsoo TI - PARIS and ELSA: An Elastic Scheduling Algorithm for Reconfigurable Multi-GPU Inference Servers. JO - CoRR VL - abs/2202.13481 PY - 2022// UR - https://arxiv.org/abs/2202.13481 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2203-00158 AU - Kang, Minhoo AU - Hwang, Ranggi AU - Lee, Jiwon AU - Kam, Dongyun AU - Lee, Youngjoo AU - Rhu, Minsoo TI - GROW: A Row-Stationary Sparse-Dense GEMM Accelerator for Memory-Efficient Graph Convolutional Neural Networks. JO - CoRR VL - abs/2203.00158 PY - 2022// DO - 10.48550/ARXIV.2203.00158 UR - https://doi.org/10.48550/arXiv.2203.00158 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2205-00922 AU - Kim, Jongmin AU - Lee, Gwangho AU - Kim, Sangpyo AU - Sohn, Gina AU - Kim, John AU - Rhu, Minsoo AU - Ahn, Jung Ho TI - ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. JO - CoRR VL - abs/2205.00922 PY - 2022// DO - 10.48550/ARXIV.2205.00922 UR - https://doi.org/10.48550/arXiv.2205.00922 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2205-04702 AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Training Personalized Recommendation Systems from (GPU) Scratch: Look Forward not Backwards. JO - CoRR VL - abs/2205.04702 PY - 2022// DO - 10.48550/ARXIV.2205.04702 UR - https://doi.org/10.48550/arXiv.2205.04702 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2205-04711 AU - Lee, Yunjae AU - Chung, Jinha AU - Rhu, Minsoo TI - SmartSAGE: Training Large-scale Graph Neural Networks using In-Storage Processing Architectures. JO - CoRR VL - abs/2205.04711 PY - 2022// DO - 10.48550/ARXIV.2205.04711 UR - https://doi.org/10.48550/arXiv.2205.04711 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2208-12392 AU - Park, Beomsik AU - Hwang, Ranggi AU - Yoon, Dongho AU - Choi, Yoonhyuk AU - Rhu, Minsoo TI - DiVa: An Accelerator for Differentially Private Machine Learning. JO - CoRR VL - abs/2208.12392 PY - 2022// DO - 10.48550/ARXIV.2208.12392 UR - https://doi.org/10.48550/arXiv.2208.12392 ER - TY - JOUR ID - DBLP:journals/cal/KimPLRA21 AU - Kim, Byeongho AU - Park, Jaehyun AU - Lee, Eojin AU - Rhu, Minsoo AU - Ahn, Jung Ho TI - TRiM: Tensor Reduction in Memory. JO - IEEE Comput. Archit. Lett. VL - 20 IS - 1 SP - 5 EP - 8 PY - 2021// DO - 10.1109/LCA.2020.3042805 UR - https://doi.org/10.1109/LCA.2020.3042805 ER - TY - JOUR ID - DBLP:journals/cal/HyunLR21 AU - Hyun, Bongjoon AU - Lee, Jiwon AU - Rhu, Minsoo TI - Characterization and Analysis of Deep Learning for 3D Point Cloud Analytics. JO - IEEE Comput. Archit. Lett. VL - 20 IS - 2 SP - 106 EP - 109 PY - 2021// DO - 10.1109/LCA.2021.3099117 UR - https://doi.org/10.1109/LCA.2021.3099117 ER - TY - JOUR ID - DBLP:journals/cal/LeeKR21 AU - Lee, Yunjae AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Understanding the Implication of Non-Volatile Memory for Large-Scale Graph Neural Network Training. JO - IEEE Comput. Archit. Lett. VL - 20 IS - 2 SP - 118 EP - 121 PY - 2021// DO - 10.1109/LCA.2021.3098943 UR - https://doi.org/10.1109/LCA.2021.3098943 ER - TY - CPAPER ID - DBLP:conf/hpca/KwonLR21 AU - Kwon, Youngeun AU - Lee, Yunjae AU - Rhu, Minsoo TI - Tensor Casting: Co-Designing Algorithm-Architecture for Personalized Recommendation Training. BT - IEEE International Symposium on High-Performance Computer Architecture, HPCA 2021, Seoul, South Korea, February 27 - March 3, 2021 SP - 235 EP - 248 PY - 2021// DO - 10.1109/HPCA51647.2021.00029 UR - https://doi.org/10.1109/HPCA51647.2021.00029 ER - TY - CPAPER ID - DBLP:conf/hpca/AhnJKRFKK21 AU - Ahn, Jaeguk AU - Jin, Cheolgyu AU - Kim, Jiho AU - Rhu, Minsoo AU - Fei, Yunsi AU - Kaeli, David R. AU - Kim, John TI - Trident: A Hybrid Correlation-Collision GPU Cache Timing Attack for AES Key Recovery. BT - IEEE International Symposium on High-Performance Computer Architecture, HPCA 2021, Seoul, South Korea, February 27 - March 3, 2021 SP - 332 EP - 344 PY - 2021// DO - 10.1109/HPCA51647.2021.00036 UR - https://doi.org/10.1109/HPCA51647.2021.00036 ER - TY - CPAPER ID - DBLP:conf/hpca/ChoiKR21 AU - Choi, Yujeong AU - Kim, Yunseong AU - Rhu, Minsoo TI - Lazy Batching: An SLA-aware Batching System for Cloud Machine Learning Inference. BT - IEEE International Symposium on High-Performance Computer Architecture, HPCA 2021, Seoul, South Korea, February 27 - March 3, 2021 SP - 493 EP - 506 PY - 2021// DO - 10.1109/HPCA51647.2021.00049 UR - https://doi.org/10.1109/HPCA51647.2021.00049 ER - TY - CPAPER ID - DBLP:conf/micro/ParkKYLRA21 AU - Park, Jaehyun AU - Kim, Byeongho AU - Yun, Sungmin AU - Lee, Eojin AU - Rhu, Minsoo AU - Ahn, Jung Ho TI - TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory. BT - MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021 SP - 268 EP - 281 PY - 2021// DO - 10.1145/3466752.3480080 UR - https://doi.org/10.1145/3466752.3480080 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2112-15479 AU - Kim, Sangpyo AU - Kim, Jongmin AU - Kim, Michael Jaemin AU - Jung, Wonkyung AU - Rhu, Minsoo AU - Kim, John AU - Ahn, Jung Ho TI - BTS: An Accelerator for Bootstrappable Fully Homomorphic Encryption. JO - CoRR VL - abs/2112.15479 PY - 2021// UR - https://arxiv.org/abs/2112.15479 ER - TY - CPAPER ID - DBLP:conf/IEEEpact/KimCRBAK20 AU - Kim, Jiho AU - Cho, Sanghun AU - Rhu, Minsoo AU - Bakhoda, Ali AU - Aamodt, Tor M. AU - Kim, John TI - Bandwidth Bottleneck in Network-on-Chip for High-Throughput Processors. BT - PACT '20: International Conference on Parallel Architectures and Compilation Techniques, Virtual Event, GA, USA, October 3-7, 2020 SP - 157 EP - 158 PY - 2020// DO - 10.1145/3410463.3414673 UR - https://doi.org/10.1145/3410463.3414673 ER - TY - CPAPER ID - DBLP:conf/asplos/HyunKCKR20 AU - Hyun, Bongjoon AU - Kwon, Youngeun AU - Choi, Yujeong AU - Kim, John AU - Rhu, Minsoo TI - NeuMMU: Architectural Support for Efficient Address Translations in Neural Processing Units. BT - ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, March 16-20, 2020. SP - 1109 EP - 1124 PY - 2020// DO - 10.1145/3373376.3378494 UR - https://doi.org/10.1145/3373376.3378494 ER - TY - CPAPER ID - DBLP:conf/hpca/ChoiR20 AU - Choi, Yujeong AU - Rhu, Minsoo TI - PREMA: A Predictive Multi-Task Scheduling Algorithm For Preemptible Neural Processing Units. BT - IEEE International Symposium on High Performance Computer Architecture, HPCA 2020, San Diego, CA, USA, February 22-26, 2020 SP - 220 EP - 233 PY - 2020// DO - 10.1109/HPCA47549.2020.00027 UR - https://doi.org/10.1109/HPCA47549.2020.00027 ER - TY - CPAPER ID - DBLP:conf/isca/HwangKKR20 AU - Hwang, Ranggi AU - Kim, Taehun AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Centaur: A Chiplet-based, Hybrid Sparse-Dense Accelerator for Personalized Recommendations. BT - 47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020 SP - 968 EP - 981 PY - 2020// DO - 10.1109/ISCA45697.2020.00083 UR - https://doi.org/10.1109/ISCA45697.2020.00083 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2005-05968 AU - Hwang, Ranggi AU - Kim, Taehun AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Centaur: A Chiplet-based, Hybrid Sparse-Dense Accelerator for Personalized Recommendations. JO - CoRR VL - abs/2005.05968 PY - 2020// UR - https://arxiv.org/abs/2005.05968 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2010-13100 AU - Kwon, Youngeun AU - Lee, Yunjae AU - Rhu, Minsoo TI - Tensor Casting: Co-Designing Algorithm-Architecture for Personalized Recommendation Training. JO - CoRR VL - abs/2010.13100 PY - 2020// UR - https://arxiv.org/abs/2010.13100 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-2010-13103 AU - Choi, Yujeong AU - Kim, Yunseong AU - Rhu, Minsoo TI - LazyBatching: An SLA-aware Batching System for Cloud Machine Learning Inference. JO - CoRR VL - abs/2010.13103 PY - 2020// UR - https://arxiv.org/abs/2010.13103 ER - TY - JOUR ID - DBLP:journals/micro/KwonR19 AU - Kwon, Youngeun AU - Rhu, Minsoo TI - A Disaggregated Memory System for Deep Learning. JO - IEEE Micro VL - 39 IS - 5 SP - 82 EP - 90 PY - 2019// DO - 10.1109/MM.2019.2929165 UR - https://doi.org/10.1109/MM.2019.2929165 ER - TY - CPAPER ID - DBLP:conf/micro/KwonLR19 AU - Kwon, Youngeun AU - Lee, Yunjae AU - Rhu, Minsoo TI - TensorDIMM: A Practical Near-Memory Processing Architecture for Embeddings and Tensor Operations in Deep Learning. BT - Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019, Columbus, OH, USA, October 12-16, 2019. SP - 740 EP - 753 PY - 2019// DO - 10.1145/3352460.3358284 UR - https://doi.org/10.1145/3352460.3358284 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-1902-06468 AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Beyond the Memory Wall: A Case for Memory-centric HPC System for Deep Learning. JO - CoRR VL - abs/1902.06468 PY - 2019// UR - http://arxiv.org/abs/1902.06468 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-1908-03072 AU - Kwon, Youngeun AU - Lee, Yunjae AU - Rhu, Minsoo TI - TensorDIMM: A Practical Near-Memory Processing Architecture for Embeddings and Tensor Operations in Deep Learning. JO - CoRR VL - abs/1908.03072 PY - 2019// UR - http://arxiv.org/abs/1908.03072 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-1909-04548 AU - Choi, Yujeong AU - Rhu, Minsoo TI - PREMA: A Predictive Multi-task Scheduling Algorithm For Preemptible Neural Processing Units. JO - CoRR VL - abs/1909.04548 PY - 2019// UR - http://arxiv.org/abs/1909.04548 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-1911-06859 AU - Hyun, Bongjoon AU - Kwon, Youngeun AU - Choi, Yujeong AU - Kim, John AU - Rhu, Minsoo TI - NeuMMU: Architectural Support for Efficient Address Translations in Neural Processing Units. JO - CoRR VL - abs/1911.06859 PY - 2019// UR - http://arxiv.org/abs/1911.06859 ER - TY - JOUR ID - DBLP:journals/cal/KwonR18 AU - Kwon, Youngeun AU - Rhu, Minsoo TI - A Case for Memory-Centric HPC System Architecture for Training Deep Neural Networks. JO - IEEE Comput. Archit. Lett. VL - 17 IS - 2 SP - 134 EP - 138 PY - 2018// DO - 10.1109/LCA.2018.2823302 UR - https://doi.org/10.1109/LCA.2018.2823302 UR - http://doi.ieeecomputersociety.org/10.1109/LCA.2018.2823302 ER - TY - CPAPER ID - DBLP:conf/aspdac/Rhu18 AU - Rhu, Minsoo TI - Accelerator-centric deep learning systems for enhanced scalability, energy-efficiency, and programmability. BT - 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018 SP - 527 EP - 533 PY - 2018// DO - 10.1109/ASPDAC.2018.8297377 UR - https://doi.org/10.1109/ASPDAC.2018.8297377 UR - http://dl.acm.org/citation.cfm?id=3201732 ER - TY - CPAPER ID - DBLP:conf/hpca/RhuOCPKK18 AU - Rhu, Minsoo AU - O'Connor, Mike AU - Chatterjee, Niladrish AU - Pool, Jeff AU - Kwon, Youngeun AU - Keckler, Stephen W. TI - Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. BT - IEEE International Symposium on High Performance Computer Architecture, HPCA 2018, Vienna, Austria, February 24-28, 2018 SP - 78 EP - 91 PY - 2018// DO - 10.1109/HPCA.2018.00017 UR - https://doi.org/10.1109/HPCA.2018.00017 UR - https://doi.ieeecomputersociety.org/10.1109/HPCA.2018.00017 ER - TY - CPAPER ID - DBLP:conf/micro/KwonR18 AU - Kwon, Youngeun AU - Rhu, Minsoo TI - Beyond the Memory Wall: A Case for Memory-Centric HPC System for Deep Learning. BT - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, October 20-24, 2018 SP - 148 EP - 161 PY - 2018// DO - 10.1109/MICRO.2018.00021 UR - https://doi.org/10.1109/MICRO.2018.00021 UR - https://doi.ieeecomputersociety.org/10.1109/MICRO.2018.00021 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-1806-00512 AU - Zhu, Maohua AU - Clemons, Jason AU - Pool, Jeff AU - Rhu, Minsoo AU - Keckler, Stephen W. AU - Xie, Yuan TI - Structurally Sparsified Backward Propagation for Faster Long Short-Term Memory Training. JO - CoRR VL - abs/1806.00512 PY - 2018// UR - http://arxiv.org/abs/1806.00512 ER - TY - CPAPER ID - DBLP:conf/hpca/ChatterjeeOLJKR17 AU - Chatterjee, Niladrish AU - O'Connor, Mike AU - Lee, Donghyuk AU - Johnson, Daniel R. AU - Keckler, Stephen W. AU - Rhu, Minsoo AU - Dally, William J. TI - Architecting an Energy-Efficient DRAM System for GPUs. BT - 2017 IEEE International Symposium on High Performance Computer Architecture, HPCA 2017, Austin, TX, USA, February 4-8, 2017 SP - 73 EP - 84 PY - 2017// DO - 10.1109/HPCA.2017.58 UR - https://doi.org/10.1109/HPCA.2017.58 UR - https://doi.ieeecomputersociety.org/10.1109/HPCA.2017.58 ER - TY - CPAPER ID - DBLP:conf/isca/ParasharRMPVKEK17 AU - Parashar, Angshuman AU - Rhu, Minsoo AU - Mukkara, Anurag AU - Puglielli, Antonio AU - Venkatesan, Rangharajan AU - Khailany, Brucek AU - Emer, Joel S. AU - Keckler, Stephen W. AU - Dally, William J. TI - SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. BT - Proceedings of the 44th Annual International Symposium on Computer Architecture, ISCA 2017, Toronto, ON, Canada, June 24-28, 2017 SP - 27 EP - 40 PY - 2017// DO - 10.1145/3079856.3080254 UR - https://doi.org/10.1145/3079856.3080254 ER - TY - CPAPER ID - DBLP:conf/micro/KimJJRKK17 AU - Kim, Youngsok AU - Jo, Jae-Eon AU - Jang, Hanhwi AU - Rhu, Minsoo AU - Kim, Hanjun AU - Kim, Jangwoo TI - GPUpd: a fast and scalable multi-GPU architecture using cooperative projection and distribution. BT - Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2017, Cambridge, MA, USA, October 14-18, 2017 SP - 574 EP - 586 PY - 2017// DO - 10.1145/3123939.3123968 UR - https://doi.org/10.1145/3123939.3123968 UR - https://ieeexplore.ieee.org/document/8686578 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/RhuOCPK17 AU - Rhu, Minsoo AU - O'Connor, Mike AU - Chatterjee, Niladrish AU - Pool, Jeff AU - Keckler, Stephen W. TI - Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. JO - CoRR VL - abs/1705.01626 PY - 2017// UR - http://arxiv.org/abs/1705.01626 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/abs-1708-04485 AU - Parashar, Angshuman AU - Rhu, Minsoo AU - Mukkara, Anurag AU - Puglielli, Antonio AU - Venkatesan, Rangharajan AU - Khailany, Brucek AU - Emer, Joel S. AU - Keckler, Stephen W. AU - Dally, William J. TI - SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. JO - CoRR VL - abs/1708.04485 PY - 2017// UR - http://arxiv.org/abs/1708.04485 ER - TY - CPAPER ID - DBLP:conf/micro/RhuGCZK16 AU - Rhu, Minsoo AU - Gimelshein, Natalia AU - Clemons, Jason AU - Zulfiqar, Arslan AU - Keckler, Stephen W. TI - vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design. BT - 49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016, Taipei, Taiwan, October 15-19, 2016 SP - 18:1 EP - 18:13 PY - 2016// DO - 10.1109/MICRO.2016.7783721 UR - https://doi.org/10.1109/MICRO.2016.7783721 UR - https://doi.ieeecomputersociety.org/10.1109/MICRO.2016.7783721 UR - http://dl.acm.org/citation.cfm?id=3195660 ER - TY - Informal or Other Publication ID - DBLP:journals/corr/RhuGCZK16 AU - Rhu, Minsoo AU - Gimelshein, Natalia AU - Clemons, Jason AU - Zulfiqar, Arslan AU - Keckler, Stephen W. TI - Virtualizing Deep Neural Networks for Memory-Efficient Neural Network Design. JO - CoRR VL - abs/1602.08124 PY - 2016// UR - http://arxiv.org/abs/1602.08124 ER - TY - CPAPER ID - DBLP:conf/hpca/LiRJOEBFR15 AU - Li, Dong AU - Rhu, Minsoo AU - Johnson, Daniel R. AU - O'Connor, Mike AU - Erez, Mattan AU - Burger, Doug AU - Fussell, Donald S. AU - Redder, Stephen W. TI - Priority-based cache allocation in throughput processors. BT - 21st IEEE International Symposium on High Performance Computer Architecture, HPCA 2015, Burlingame, CA, USA, February 7-11, 2015 SP - 89 EP - 100 PY - 2015// DO - 10.1109/HPCA.2015.7056024 UR - https://doi.org/10.1109/HPCA.2015.7056024 UR - https://doi.ieeecomputersociety.org/10.1109/HPCA.2015.7056024 ER - TY - CPAPER ID - DBLP:conf/micro/GongRKCE15 AU - Gong, Seong-Lyong AU - Rhu, Minsoo AU - Kim, Jungrae AU - Chung, Jinsuk AU - Erez, Mattan TI - CLEAN-ECC: high reliability ECC for adaptive granularity memory system. BT - Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015 SP - 611 EP - 622 PY - 2015// DO - 10.1145/2830772.2830799 UR - https://doi.org/10.1145/2830772.2830799 UR - https://ieeexplore.ieee.org/document/7856631/ ER - TY - CPAPER ID - DBLP:conf/islped/LengZRGR14 AU - Leng, Jingwen AU - Zu, Yazhou AU - Rhu, Minsoo AU - Gupta, Meeta Sharma AU - Reddi, Vijay Janapa TI - GPUVolt: modeling and characterizing voltage noise in GPU architectures. BT - International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014 SP - 141 EP - 146 PY - 2014// DO - 10.1145/2627369.2627605 UR - https://doi.org/10.1145/2627369.2627605 ER - TY - CPAPER ID - DBLP:conf/hpca/RhuE13 AU - Rhu, Minsoo AU - Erez, Mattan TI - The dual-path execution model for efficient GPU control flow. BT - 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013 SP - 591 EP - 602 PY - 2013// DO - 10.1109/HPCA.2013.6522352 UR - https://doi.org/10.1109/HPCA.2013.6522352 UR - https://doi.ieeecomputersociety.org/10.1109/HPCA.2013.6522352 ER - TY - CPAPER ID - DBLP:conf/isca/RhuE13 AU - Rhu, Minsoo AU - Erez, Mattan TI - Maximizing SIMD resource utilization in GPGPUs with SIMD lane permutation. BT - The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013 SP - 356 EP - 367 PY - 2013// DO - 10.1145/2485922.2485953 UR - https://doi.org/10.1145/2485922.2485953 ER - TY - CPAPER ID - DBLP:conf/micro/RhuSLE13 AU - Rhu, Minsoo AU - Sullivan, Michael B. AU - Leng, Jingwen AU - Erez, Mattan TI - A locality-aware memory hierarchy for energy-efficient GPU architectures. BT - The 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, Davis, CA, USA, December 7-11, 2013 SP - 86 EP - 98 PY - 2013// DO - 10.1145/2540708.2540717 UR - https://doi.org/10.1145/2540708.2540717 UR - https://ieeexplore.ieee.org/document/7847617/ ER - TY - CPAPER ID - DBLP:conf/isca/RhuE12 AU - Rhu, Minsoo AU - Erez, Mattan TI - CAPRI: Prediction of compaction-adequacy for handling control-divergence in GPGPU architectures. BT - 39th International Symposium on Computer Architecture (ISCA 2012), June 9-13, 2012, Portland, OR, USA SP - 61 EP - 71 PY - 2012// DO - 10.1109/ISCA.2012.6237006 UR - https://doi.org/10.1109/ISCA.2012.6237006 UR - https://doi.ieeecomputersociety.org/10.1109/ISCA.2012.6237006 UR - http://dl.acm.org/citation.cfm?id=2337167 ER - TY - JOUR ID - DBLP:journals/tcsv/RhuP10 AU - Rhu, Minsoo AU - Park, In-Cheol TI - Optimization of Arithmetic Coding for JPEG2000. JO - IEEE Trans. Circuits Syst. Video Technol. VL - 20 IS - 3 SP - 446 EP - 451 PY - 2010// DO - 10.1109/TCSVT.2009.2031401 UR - https://doi.org/10.1109/TCSVT.2009.2031401 ER - TY - CPAPER ID - DBLP:conf/icip/RhuP09 AU - Rhu, Minsoo AU - Park, In-Cheol TI - Architecture design of a high-performance dual-symbol binary arithmetic coder for JPEG2000. BT - Proceedings of the International Conference on Image Processing, ICIP 2009, 7-10 November 2009, Cairo, Egypt SP - 2665 EP - 2668 PY - 2009// DO - 10.1109/ICIP.2009.5414131 UR - https://doi.org/10.1109/ICIP.2009.5414131 ER - TY - CPAPER ID - DBLP:conf/icip/RhuP09a AU - Rhu, Minsoo AU - Park, In-Cheol TI - Memory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding. BT - Proceedings of the International Conference on Image Processing, ICIP 2009, 7-10 November 2009, Cairo, Egypt SP - 2673 EP - 2676 PY - 2009// DO - 10.1109/ICIP.2009.5414124 UR - https://doi.org/10.1109/ICIP.2009.5414124 ER - TY - CPAPER ID - DBLP:conf/sips/RhuP09 AU - Rhu, Minsoo AU - Park, In-Cheol TI - A novel trace-pipelined binary arithmetic coder architecture for JPEG2000. BT - Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2009, October 7-9, 2009, Tampere, Finland SP - 243 EP - 248 PY - 2009// DO - 10.1109/SIPS.2009.5336259 UR - https://doi.org/10.1109/SIPS.2009.5336259 ER -