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ORCIDMicroelectronics Journal, Volume 63
Volume 63, May 2017
- Iftekhar Ibne Basith, Esrafil Jedari, Rashid Rashidzadeh:
A contactless probe utilizing inductive coupling. 1-7 - Brent Maundy, Serdar Özoguz
, Ahmed S. Elwakil, Stephan J. G. Gift:
The common-base differential amplifier and applications revisited. 8-19 - Zheng Mei, Gang Dong, Yintang Yang, Junping Zheng, Jingrui Chai, Weijun Zhu:
Universal closed-form expression based on magnetic flux density for the inductance of Tapered Through-Silicon Vias (T-TSVs). 20-26 - Kan Li, Yuanjin Zheng, Liter Siek:
A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design. 27-34 - Ziyang Luo, Yan Lu, Mo Huang, Junmin Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A sub-1V 78-nA bandgap reference with curvature compensation. 35-40 - Hadi Samadi, Ali Shahhoseini, Faramarz Aghaei-liavali:
A new method on designing and simulating CNTFET_based ternary gates and arithmetic circuits. 41-48 - Hao Zheng, Rui Ma, Zhangming Zhu:
Design of linear dynamic range and high sensitivity matrix quadrant APDs ROIC for position sensitive detector application. 49-57 - Xiaofeng Zhou, Zhangming Zhu:
A dynamic task mapping algorithm for SDNoC. 58-65 - Niharika Narang, Bhawna Aggarwal, Maneesha Gupta:
DTMOS and FD-FVF based low voltage high performance Voltage Differencing Transconductance Amplifier (VDTA) and its application in MISO filter. 66-74 - Xiaonian Liu, Yiran Xu, Xiangquan Fan, Mengxing Liao, Pingliang Li, Shichang Zou:
A macro SPICE model for 2-bits/cell split-gate flash memory cell. 75-80 - Alireza Monemi, Chia Yee Ooi, Maurizio Palesi, Muhammad N. Marsono:
Ping-lock round robin arbiter. 81-93 - Rasoul Faraji, Hosein Farzanehfard, Ehsan Adib:
Efficiency improvement of integrated synchronous buck converter using body biasing for ultra-low-voltage applications. 94-103 - Maliang Liu, Kaixiong Lian, Yingzhou Huang, Rui Ma, Zhangming Zhu:
A 12-bit 200MS/s pipeline ADC with 91 mW power and 66 dB SNDR. 104-111 - Satyanarayana Vollala, V. V. Varadhan, K. Geetha, N. Ramasubramanian:
Design of RSA processor for concurrent cryptographic transformations. 112-122 - Cosmin Radu Popa:
High output dynamic range exponential function synthesizer. 123-130 - Yung-Hui Chung, Cheng-Hsun Tsai, Hsuan-Chih Yeh:
A 5-bit 1-GS/s binary-search ADC in 90-nm CMOS. 131-137 - Bahram Rashidi:
High-speed hardware implementation of Gaussian normal basis inversion algorithm over F2m. 138-147 - Jin Wu, Wenlong Zhang, Xiangrong Yu, Qi Jiang, Lixia Zheng, Weifeng Sun:
A hybrid time-to-digital converter based on residual time extraction and amplification. 148-154 - Alessandro Parisi, Alessandro Finocchiaro, Giuseppe Palmisano:
An accurate 1-V threshold voltage reference for ultra-low power applications. 155-159 - Yonghun Sim, Jonghoon Park, Jinho Yoo, Changhyun Lee, Changkun Park:
A CMOS power amplifier using an active balun as a driver stage to enhance its gain. 160-169
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