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ORCIDIEEE Journal of Solid-State Circuits, Volume 59
Volume 59, Number 1, January 2024
- Dennis Sylvester
:
New Associate Editor. 3 - Mike Shuo-Wei Chen, Visvesh S. Sathe, Massimo Alioto, Jae-Sun Seo, Hidehiro Shiga:
Guest Editorial Introduction to the Special Section on the 2023 IEEE International Solid-State Circuits Conference (ISSCC). 4-7 - Bo Zhang, Anand Vasani, Ashutosh Sinha, Alireza Nilchi, Haitao Tong, Lakshmi P. Rao, Karapet Khanoyan, Hamid Hatamkhani, Xiaochen Yang, Xin Meng, Alexander Wong, Jun Kim, Ping Jing, Yehui Sun, Ali Nazemi, Dean Liu, Anthony Brewster, Jun Cao, Afshin Momtaz:
A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology. 8-18 - Bingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He:
A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS. 19-28 - Heejin Yang, Ji-Hwan Seol, Rohit Rothe, Zichen Fan, Qirui Zhang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
A 1.5-μW Fully-Integrated Keyword Spotting SoC in 28-nm CMOS With Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping. 29-39 - Qiaochu Zhang, Hsiang-Chun Cheng, Shiyu Su, Mike Shuo-Wei Chen:
Fractional-N Digital MDLL With Injection-Error Scrambling and Calibration. 40-51 - Ashwin Sanjay Lele, Muya Chang, Samuel D. Spetalnick, Brian Crafton, Shota Konno, Zishen Wan, Ashwin Bhat, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury:
A Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Fused Frame and Event-Based Target Identification and Tracking. 52-64 - Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing. 65-78 - Raghavan Kumar, Avinash L. Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu K. Mathew:
A 100-Gbps Fault-Injection Attack-Resistant AES-256 Engine With 99.1%-99.99% Error Coverage in Intel 4 CMOS. 79-89 - Fengbin Tu, Zihan Wu, Yiqi Wang, Weiwei Wu, Leibo Liu, Yang Hu, Shaojun Wei, Shouyi Yin:
MulTCIM: Digital Computing-in-Memory-Based Multimodal Transformer Accelerator With Attention-Token-Bit Hybrid Sparsity. 90-101 - Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo:
DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell. 102-115 - Hung-Hsi Hsu, Tai-Hao Wen, Wei-Hsing Huang, Win-San Khwa, Yun-Chen Lo, Chuan-Jia Jhang, Yu-Hsiang Chin, Yu-Chiao Chen, Chung-Chuan Lo, Ren-Shuo Liu, Kea-Tiong Tang, Chih-Cheng Hsieh, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme. 116-127 - Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. 128-142 - Seunghyun Moon, Han-Gyeol Mun, Hyunwoo Son, Jae-Yoon Sim:
Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste. 143-156 - Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo:
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. 157-172 - Jooyoung Bae, Wonsik Oh, Jahyun Koo, Chengshuo Yu, Bongjin Kim:
CTLE-Ising: A Continuous-Time Latch-Based Ising Machine Featuring One-Shot Fully Parallel Spin Updates and Equalization of Spin States. 173-183 - Jahoon Jin, Soo-Min Lee, Kyunghwan Min, Sodam Ju, Jihoon Lim, Jisu Yook, Jihoon Lee, Hyunsu Chae, Kwonwoo Kang, Yunji Hong, Yeongcheol Jeong, Sungsik Park, Sang-Ho Kim, Jongwoo Lee, Joonsuk Kim, Sung-Ung Kwak:
A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization. 184-195 - Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips. 196-207 - Qiqiao Wu, Yue Cao, Qing Luo, Haijun Jiang, Zhongze Han, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu, Jianguo Yang, Ming Liu:
A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. 208-218 - De-Qi You, Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
An 8b-Precision 8-Mb STT-MRAM Near-Memory-Compute Macro Using Weight-Feature and Input-Sparsity Aware Schemes for Energy-Efficient Edge AI Devices. 219-230 - Kwanyeob Chae, Jaegeun Song, Yoonjae Choi, Jiyeon Park, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Kyeongkeun Kang, Eunsu Kim, Juyoung Kim, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin:
A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection. 231-242 - Lili Chen, Andreia Cathelin, Ehsan Afshari:
A High-Efficiency High-Power 170-176-GHz Frequency Stabilized Quadrature Radiator. 243-252 - Ziyi Lin, Haikun Jia, Ruichang Ma, Wei Deng, Zhihua Wang, Baoyong Chi:
A Low-Phase-Noise VCO With Common-Mode Resonance Expansion and Intrinsic Differential 2nd-Harmonic Output Based on a Single Three-Coil Transformer. 253-267 - Shanthi Pavan, Saravana Manivannan, Nishanth Basavaraj:
Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining. 268-281 - Xiaoyu Guo, Hongge Li, Yuhao Chen:
A 3.58 nJ/Node Dual Cross Correlation Analog-Front-End Circuit With ADC for Mutual Capacitive Panel. 282-293 - Agata Iesurum, Davide Manente, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua:
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs. 294-306 - Seyed Mojtaba Sadati Faramarzi, Bin Luo, Jef Poortmans, Jan Genoe, Kris Myny:
Thin-Film Transistor-Based Sensor Interface Circuits Enabling Distributed Local In-Module Solar Cell Temperature Monitoring. 307-315
Volume 59, Number 2, February 2024
- Dennis Sylvester:
New Associate Editor. 319 - Christian Elgaard, Mustafa Özen, Eric Westesson, Ahmed Mahmoud, Florent Torres, Shakila Bint Reyaz, Therese Forsberg, Rehman Akbar, Hans Hagberg, Henrik Sjöland:
Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS. 321-336 - Milad Moosavifar, Jaeho Im, David D. Wentzloff:
An Interference-Resilient Bit-Level Duty-Cycled ULP Receiver Leveraging a Dual-Chirp Modulation. 337-348 - Xi Fu, Dongwon You, Yun Wang, Xiaolin Wang, Ashbir Aviat Fadila, Chenxin Liu, Sena Kato, Chun Wang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada:
A Low-Power Radiation-Hardened Ka-Band CMOS Phased-Array Receiver for Small Satellite Constellation. 349-363 - Tianxiang Qu, Peizhuo Wang, Liangbo Lei, Zhiliang Hong, Jiawei Xu:
A 136-GΩ Input-Impedance Active Electrode for Non-Contact Biopotential Signals Monitoring. 364-374 - Liang Gao, Chi Hou Chan:
A 144-Element Beam-Steerable Source Array With 9.1-dBm Radiated Power and 30.8-dBm Lensless EIPR at 675 GHz. 375-387 - Tao Wang, Jieyang Li, Di Hua, Liangbo Lei, Peng Cao, Peng Xu, Jiawei Xu, Zhiliang Hong:
A Fully Integrated Digital Polar Transmitter With Single-Ended Doherty PA and DLL-Based Three-Segment Hybrid DTC in 28 nm CMOS. 388-399 - Guansheng Lv, Wenhua Chen, Long Chen, Fadhel M. Ghannouchi, Zhenghe Feng:
A 4.9-7.1-GHz High-Efficiency Post-Matching GaN Front-End Module for Wi-Fi 7 Application. 400-413 - Jongho Yoo, Songcheol Hong:
Highly Efficient Differential Frequency Doubler With Output Resistance Boosting Feedback. 414-423 - Juyeop Kim, Yongwoo Jo, Hangi Park, Taeho Seong, Younghyun Lim, Jaehyouk Choi:
A 12.8-15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation. 424-434 - Heyi Li, Kaixuan Du, Yuanxin Bao, Yanchi Dong, Jiayoon Ru, Han Xiao, Hao Zhang, Zhixuan Wang, Yi Zhong, Linxiao Shen, Le Ye, Ru Huang:
A 0.39-mm2 Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom CDC. 435-448 - Li Wang, Zhao Zhang, Can Wang, Rehan Azmat, Weimin Shi, C. Patrick Yue:
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR. 449-463 - Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time. 464-475 - Yannick M. Hopf, Djalma Simões dos Santos, Boudewine W. Ossenkoppele, Mehdi Soozande, Emile Noothout, Zu-Yao Chang, Chao Chen, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs:
A Pitch-Matched High-Frame-Rate Ultrasound Imaging ASIC for Catheter-Based 3-D Probes. 476-491 - Chia-Chi Kuo, Rihito Kuroda:
A 134×132 4-Tap CMOS Indirect Time-of-Flight Range Imager Using In-Pixel Memory Array With 10 Kfps High-Speed Mode and High Precision Mode. 492-501 - Xiaoliang Li, Vincent P. J. Chung, Metin G. Guney, Tamal Mukherjee, Gary K. Fedder, Jeyanandh Paramesh:
A 46.6 μg/√Hz Single-Chip Accelerometer Exploiting a DTC-Assisted Chopper Amplifier. 502-515 - Jonas Pelgrims, Kris Myny, Wim Dehaene:
An Ultrasonic Driver Array in Metal-Oxide Thin-Film Technology Using a Hybrid TFT-Si DLL Locking Architecture. 516-527 - Kyeongwon Jeong, Sohmyung Ha, Minkyu Je:
A 15.4-ENOB, Fourth-Order Truncation-Error-Shaping NS-SAR-Nested ΔΣ Modulator With Boosted Input Impedance and Range for Biosignal Acquisition. 528-539 - Chi-Wa U, Man-Kay Law, Rui Paulo Martins, Chi-Seng Lam:
Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within - 40°C to 120°C. 540-550 - Hyunjin Kim, ChangHun Park, Inho Park, Taehyeong Park, Seungwoo Park, Chulwoo Kim:
A Four-Phase Time-Based Switched-Capacitor LDO With 13-ns Settling Time at 0.5-V Input for Energy-Efficient Computing in SoC Applications. 551-562 - Arindam Mishra, Wei Zhu, Bernhard Wicht, Valentijn De Smedt:
A Dual-Inductor Ladder Buck Converter for Li-Ion Battery-Operated Sub-Volt SoCs. 563-573 - Fu-Bin Yang, Dao-Han Yao, Po-Hung Chen:
A Quad-Mode Structure-Reconfigurable Regulating Rectifier With Shared-Inductor DC-DC Energy Recycling in a Wireless Power Receiver. 574-582 - Xin Ming, Jian-Jun Kuang, Xin-Ce Gong, Jie Zhang, Zhuo Wang, Bo Zhang:
An NMOS LDO With TM-MOS and Dynamic Clamp Technique Handling Up To Sub-10-μs Short-Period Load Transient. 583-594 - Junjie Wang, Teng Zhang, Shuang Liu, Yihe Liu, Yuancong Wu, Shaogang Hu, Tupei Chen, Yang Liu, Yuchao Yang, Ru Huang:
Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip. 595-604 - Jieyu Li, Weifeng He, Bo Zhang, Guanghui He, Jing Jin, Jun Yang, Mingoo Seok:
TICA: Timing Slack Inference and Clock Frequency Adaption Technique for a Deeply Pipelined Near-Threshold-Voltage Bitcoin Mining Core. 605-615 - Chuxiong Lin, Weifeng He, Yanan Sun, Lin Shao, Bo Zhang, Jun Yang, Mingoo Seok:
A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip. 616-625 - Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS. 626-635 - Sheng-Yu Peng, I-Chun Liu, Yi-Heng Wu, Ting-Ju Lin, Chun-Jui Chen, Xiu-Zhu Li, Yong-Qi Cheng, Pin-Han Lin, Kuo-Hsuan Hung, Yu Tsao:
An SRAM-Based Reconfigurable Cognitive Computation Matrix for Sensor Edge Applications. 636-648 - Dennis Sylvester:
New Associate Editor. 320
Volume 59, Number 3, March 2024
- Yan Lu, Shaolan Li:
Guest Editorial 2023 Custom Integrated Circuits Conference. 651-652 - Eunseok Lee, Muhammad Ibrahim Wasiq Khan, Xibi Chen, Utsav Banerjee, Nathan M. Monroe, Rabia Tugce Yazicigil, Ruonan Han, Anantha P. Chandrakasan:
A 1.54-mm2, 264-GHz Wake-Up Receiver With Integrated Cryptographic Authentication for Ultra-Miniaturized Platforms. 653-667 - Jiacong Ke, Zetian Lin, Guangyin Feng, Yanjie Wang:
A 52-73-GHz LNA With Tri-Coupled Transformer for Gm Boosting and Enhanced Noise Canceling. 668-676 - Zonglin Ye, Xinlin Geng, Yao Xiao, Qian Xie, Zheng Wang:
A Sub-50-fsrms Jitter Fractional-N CPPLL Based on a Dual-DTC-Assisted Time-Amplifying Phase-Frequency Detector With Cascadable DTC Nonlinearity Compensation Algorithm. 677-689 - Cooper S. Levy, Zhe Xuan, Jahnavi Sharma, Duanni Huang, Ranjeet Kumar, Chaoxuan Ma, Guan-Lin Su, Songtao Liu, Jinyong Kim, Xinru Wu, Tolga Acikalin, Haisheng Rong, Ganesh Balamurugan, James E. Jaussi:
8-λ × 50 Gbps/λ Heterogeneously Integrated Si-Ph DWDM Transmitter. 690-701 - Xiangdong Feng, Yuxuan Luo, Tianyi Cai, Yangfan Xuan, Yunshan Zhang, Yili Shen, Changgui Yang, Qijing Xiao, Sijun Du, Bo Zhao:
A 72-Channel Resistive-and-Capacitive Sensor-Interface Chip With Noise-Orthogonalizing and Pad-Sharing Techniques. 702-715 - Antonio Aprile, Michele Folz, Daniele Gardino, Piero Malcovati, Edoardo Bonizzoni:
An Area-Efficient Smart Temperature Sensor Based on a Fully Current Processing Error-Feedback Noise-Shaping SAR ADC in 180-nm CMOS. 716-727 - Liqun Feng, Woogeun Rhee, Zhihua Wang:
A DTC-Free Fractional-N BBPLL With FIR-Embedded Injection-Locked-Oscillator-Based Phase-Domain Lowpass Filter. 728-739 - Kaoru Yamashita, Benjamin P. Hershberg, Kentaro Yoshioka, Hiroki Ishikuro:
A 4.6-400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC With PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration. 740-752 - ZiXuan Xu, Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R. 753-764 - Jongho Kim, Gyuchan Cho, Jintae Kim:
A 7 GHz ERBW 1.1 GS/s 6-bit PVT Tolerant Asynchronous Charge-Injection SAR With Only 8.5 fF Input Capacitance in 28 nm CMOS. 765-773 - James Lin, Long Pham, Ran Tao, A. Gutmann, Shanglin Guo, Adam Cywar, Adam Spirer, Johan Mansson, Khiem Nguyen:
A Low-Power, Wide-Bandwidth, Three-Axis MEMS Accelerometer ASIC Using Beyond-Resonant-Frequency Sensing. 774-783 - Hsing-Yen Tsai, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A GaN-on-Si Gate Driver With Self-Pumped Drive Enhance and Short-Period Negative Voltage Techniques for Reduction of 14.7× Tailing Power Loss and 37% Reverse Conduction Loss. 784-793 - Caiyu Tong, Zihao Fan, Yuan Gao:
A Li-Ion Battery Input Highly Integrated LED Driver With 96.8% Peak Efficiency and Dual-Color Mixing Capability. 794-803 - Jianqiang Jiang, Junyao Tang, Lei Zhao, Chenchang Zhan, Cheng Huang:
A 63% Efficiency 1.29-W Single-Link Multiple-Output (SLiMO) Isolated DC-DC Converter Using FPC Micro-Transformer With Local Voltage and Global Power Regulations. 804-816 - Minju Park, Kyeongho Eom, Han-Sol Lee, Seung-Beom Ku, Hyung-Min Lee:
A 9-V-Tolerant Stacked-Switched-Capacitor Stimulation System With Level-Adaptive Switch Control and Rapid Stimulus-Synchronized Charge Balancing for Implantable Devices. 817-829 - Junsoo Kim, Seunghee Han, Geonwoo Ko, Ji-Hoon Kim, Changha Lee, Taewoo Kim, Chan-Hyun Youn, Joo-Young Kim:
EPU: An Energy-Efficient Explainable AI Accelerator With Sparsity-Free Computation and Heat Map Compression/Pruning. 830-841 - Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang, Runsheng Wang, Ru Huang:
A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM. 842-854 - Sadhana Shanmuga Sundaram, Yugandhar Khodke, Yidong Li, Sung-Joon Jang, Sang-Seol Lee, Mingu Kang:
FreFlex: A High-Performance Processor for Convolution and Attention Computations via Sparsity-Adaptive Dynamic Frequency Boosting. 855-866 - Cai Li, Haochang Zhi, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Chao Chen, Xi Wang, Weiwei Shan:
A 0.61-μW Fully Integrated Keyword-Spotting ASIC With Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN. 867-877 - Lorenzo Piotto, Guglielmo De Filippi, Gianluca Brozzetti, Daniele Dal Maistro, Simone Erba, Andrea Mazzanti:
A 14-32 GHz SiGe-BiCMOS Gilbert-Cell Frequency Doubler With Self-Adjusted Reduced Duty-Cycle Performance Enhancement. 878-888 - Carl D'heer, Patrick Reynaert:
A Fully Integrated 135-GHz Direct-Digital 16-QAM Wireless and Dielectric Waveguide Link in 28-nm CMOS. 889-907 - Daniel Widmann, Tobias Tannert, Xuan-Quang Du, Thomas Veigel, Markus Grözing, Manfred Berroth:
A Time-Interleaved Digital-to-Analog Converter up to 118 GS/s With Integrated Analog Multiplexer in 28-nm FD-SOI CMOS Technology. 908-922 - Wei Song, Xiliang Liu, Heng Huang, Yusong Wu, Zijian Tang, Jintao Wang, Fengjun Ma, Jingfeng Zhou, Milin Zhang:
A Frequency-Division Transceiver for Long-Range Neural Signal Recording From Multiple Subjects. 923-934 - Piotr Zbigniew Wieczorek, Krzysztof Starecki, Krzysztof Golofit, Maciej Radtke, Marcin Pilarz:
A Thin Elastic NFC Forum Type 1 Compatible RFID Tag. 935-946 - Kathleen Feng, Taeyoung Kong, Kalhan Koul, Jackson Melchert, Alex Carsello, Qiaoyi Liu, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. 947-959 - Chuan-Tung Lin, Dewei Wang, Bo Zhang, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok:
DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm. 960-971
Volume 59, Number 4, April 2024
- Mototsugu Hamada, Ron Kapusta:
Introduction to the Special Issue on the 2023 Symposium on VLSI Circuits. 975-977 - Chun Wang, Ibrahim Abdo, Chenxin Liu, Carrel da Gomez, Jill C. Mayeda, Hans Herdian, Wenqian Wang, Xi Fu, Dongwon You, Abanob Shehata, Sunghwan Park, Yun Wang, Jian Pang, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada:
A Sub-THz Full-Duplex Phased-Array Transceiver With Self-Interference Cancellation and LO Feedthrough Suppression. 978-992 - Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada:
A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter. 993-1005 - Jiamin Li, Yilong Dong, Longyang Lin, Joanne Si Ying Tan, Fong Jia Yi, Jerald Yoo:
Concurrent Body-Coupled Powering and Communication ICs With a Single Electrode. 1006-1016 - Hyeonho Han, Byungchoul Park, Jaesuk Sung, Heonjin Choi, Youngcheol Chae:
A Highly Digital 143.2-dB DR Sub-1° Phase Error Impedance Monitoring IC With Pulsewidth Modulation Frontend. 1017-1025 - Gabriele Atzeni, Can Livanelioglu, Sina Arjmandpour, Taekwang Jang:
An Impedance-Boosted Transformer-First Discrete-Time Analog Front-End Achieving 0.34 NEF and 389-MΩ Input Impedance. 1026-1037 - Joydeep Basu, Luigi Fassio, Karim Ali, Massimo Alioto:
Picowatt-Power Super-Cutoff Analog Building Blocks and 78-pW Battery-Less Wake-Up Receiver for Light-Harvested Near-Always-On Operation. 1038-1049 - Seunghwa Shin, Gyeong-Gu Kang, Gyu-Wan Lim, Hyun-Sik Kim:
A Display Source-Driver IC Featuring Multistage-Cascaded 10-Bit DAC and True-DC-Interpolative Super-OTA Buffer. 1050-1066 - Tuur Van Daele, Filip Tavernier:
Monolithic 230-VRMS-to-12-VDC AC-DC Converter at 9 mW/mm2 Enabled by a 31-325-VDC Input Range Capacitive Multi-Ratio DC-DC Converter. 1067-1077 - Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and COUT-Free Operations. 1078-1092 - Yuhan Hou, Yi Zhu, Xing Ji, Andrew G. Richardson, Xilin Liu:
A Wireless Sensor-Brain Interface System for Tracking and Guiding Animal Behaviors Through Closed-Loop Neuromodulation in Water Mazes. 1093-1109 - Jungho Lee, Joseph G. Letner, Jongyup Lim, Gabriele Atzeni, Jiawei Liao, Abhilasha Kamboj, Bhavika Mani, Seokhyeon Jeong, Yejoong Kim, Yi Sun, Beomseo Koo, Julianna M. Richie, Elena Della Valle, Paras R. Patel, Dennis Sylvester, Hun-Seok Kim, Taekwang Jang, Jamie Phillips, Cynthia A. Chestek, James D. Weiland, David T. Blaauw:
A Sub-mm3 Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry. 1110-1122 - Moon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore:
A 1024-Channel 268-nW/Pixel 36×36 μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. 1123-1136 - Takafumi Takatsuka, Jun Ogi, Yasuji Ikeda, Kazuki Hizu, Yutaka Inaoka, Shunsuke Sakama, Iori Watanabe, Tatsuya Ishikawa, Shohei Shimada, Junki Suzuki, Hidenori Maeda, Kenji Toshima, Yusuke Nonaka, Akifumi Yamamura, Hideki Ozawa, Fumihiko Koga, Yusuke Oike:
A 3.36-μm-Pitch SPAD Photon-Counting Image Sensor Using a Clustered Multi-Cycle Clocked Recharging Technique With an Intermediate Most-Significant-Bit Readout. 1137-1145 - Yoshinori Nishi, John W. Poulton, Walker J. Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray:
A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS. 1146-1157 - Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee:
A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. 1158-1170 - Hsiang-Wen Chen, Seungjong Lee, Michael P. Flynn:
An Anti-Aliasing-Filter-Assisted 3rd-Order VCO-Based CTDSM With NS-SAR Quantizer. 1171-1183 - Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems:
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme. 1184-1193 - Martijn Timmermans, Kyle van Oosterhout, Marco Fattori, Pieter Harpe, Yao-Hong Liu, Eugenio Cantatore:
A 1.8-65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators. 1194-1203 - Yoontae Jung, Sein Oh, Sohmyung Ha, Minkyu Je:
A 187-dB FoMS Power-Efficient Second-Order Highpass ΔΣ Capacitance-to-Digital Converter. 1204-1215 - Jeongkyun Kim, Byungho Yook, Youngo Lee, Taemin Choi, Kyuwon Choi, Chanho Lee, Juchang Lee, Hyeongcheol Kim, Seok Yun, Changhoon Do, Minwoo Kwak, Mijoung Kim, Yunrong Li, Hoyoung Tang, Jaeyoung Kim, Inhak Lee, Dongwook Seo, Sangyeop Baeck:
A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology. 1216-1224 - Yumito Aoyagi, Koji Nii, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang:
A 3-nm FinFET 27.6-Mbit/mm2 Single-Port 6T SRAM Enabling 0.48-1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking. 1225-1234 - Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang:
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration. 1235-1245 - Xichen Li, Yi-Hsiang Huang, Fucheng Yin, Jacques Christophe Rudell:
A 2.4-GHz Full-Duplex Transceiver With Broadband, Linearity-Enhanced, and Long-Delay Spread Self-Interference Cancellation. 1246-1260 - Jonghyuck Choi, Yoonjae Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Chulwoo Kim:
A Single-Ended NRZ Receiver With Gain-Enhanced Active-Inductive CTLE and Reference-Selection DFE for Memory Interfaces. 1261-1270 - Murali Krishna Rajendran, Priya Venugopal, Gajendranath Chowdary:
An Incremental Step Sensing MPPT Based SI-SIDO Energy Harvester With >99% Peak MPPT Efficiency for an Input Power Range of 30 μW to 33 mW. 1271-1282 - Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono:
A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C. 1283-1292 - Xinling Yue, Sijun Du:
Corrections to "A Synchronized Switch Harvesting Rectifier With Reusable Storage Capacitors for Piezoelectric Energy Harvesting". 1293
Volume 59, Number 5, May 2024
- Dennis Sylvester:
New Associate Editor. 1299 - Kenichi Okada:
Guest Editorial Introduction to the Special Section on the 2023 RFIC Symposium. 1300 - Sai-Wang Tam, Alireza Razzaghi, Alden Wong, Sridhar Narravula, Weiwei Xu, Timothy Loo, Akash Kambale, Asish Lowrance, Ovidiu Carnu, Yui Lin, Randy Tsang:
A 28 nm CMOS Dual-Band Concurrent WLAN and Narrow Band Transmitter With On-Chip Feedforward TX-to-TX Interference Cancellation Path for Low Antenna-to-Antenna Isolation in IoT Devices. 1301-1311 - Edward Liu, Hua Wang:
A Broadband Four-Way Parallel-Series Doherty Power Amplifier for 5G Communications. 1312-1322 - Fuyuan Zhao, Wei Deng, Haikun Jia, Wenjing Ye, Ruichen Wan, Zhihua Wang, Baoyong Chi:
A Band-Shifting Millimeter-Wave T/R Front-End Using Inductance-Mutation Transformer Technique for Multiband Phased-Array Transceivers. 1323-1336 - Mostafa Essawy, Kareem Rashed, Amin Aghighi, Arun Natarajan:
A Low-Noise Dual-Path Self-Interference Cancellation Architecture for Watt-Level TX Power Handling in Simultaneous Transmit and Receive. 1337-1350 - Jun Hwang, Dongho Yoo, Byung-Wook Min:
Compact mm-Wave Ultra-Wideband and Low-Noise Phase Alternately Distributed Quasi-Circulators. 1351-1360 - Khoi T. Phan, Yang Gao, Howard C. Luong:
A 10.8-14.5-GHz Eight-Phase 12.5%-Duty-Cycle Nonoverlapping LO Generator With Automatic Phase-and-Duty-Cycle Calibration. 1361-1370 - Mohammadreza Abbasi, Wooram Lee:
A Low-Loss Passive D-Band Phase Shifter for Calibration-Free, Precise Phase Control. 1371-1380 - Sidharth Thomas, Sam Razavian, Jaskirat Singh Virdi, Wei Sun, Benyamin Fallahi Motlagh, Aydin Babakhani:
A 400-GHz Efficient Radiator and OOK Transceiver for Multi-Gb/s Wireless Communication in Silicon. 1381-1397 - Kristof Dens, Joren Vaes, Christian Blümm, Gabriel Guimaraes, Berke Gungor, Changsong Xie, Alexander Dyck, Patrick Reynaert:
Design of a Noncoherent 100-Gb/s 3-m Dual-Band PAM-4 Dielectric Waveguide Link in 28-nm CMOS. 1398-1408 - Ghazal Movaghar, Viviana Arrunategui, Junqian Liu, Aaron Maharry, Stephen Misak, Xinhong Du, Clint L. Schow, James F. Buckwalter:
A Monolithic O-Band Coherent Optical Receiver for Energy-Efficient Links. 1409-1420 - Hadi Lotfi, Michal Kern, Qing Yang, Thomas Unden, Nico Striegler, Jochen Scharpf, Patrick Schalberger, Rainer Stöhr, Ilai Schwartz, Philipp Neumann, Jens Anders:
A Four-Channel BiCMOS Transmitter for a Quantum Magnetometer Based on Nitrogen-Vacancy Centers in Diamond. 1421-1432 - Niels Fakkel, Mohsen Mortazavi, Ramon W. J. Overwater, Fabio Sebastiano, Masoud Babaie:
A Cryo-CMOS DAC-Based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing. 1433-1446 - Jacob Dean, Sandeep Hari, Brian A. Floyd:
RF-to-Millimeter-Wave Receivers Employing Frequency-Translated Feedback. 1447-1460 - Lili Chen, Morteza Tavakoli Taba, Zainulabideen J. Khalifa, Andreia Cathelin, Ehsan Afshari:
A Fast Back-to-Lock DPLL-Based 192-210-GHz Chirp Generator With +5.9-dBm Peak Output Power for Sub-THz Imaging and Sensing. 1461-1474 - Can Wu, Yue Ma, Suresh Venkatesh, Yoni Mehlman, Murat Ozatay, Sigurd Wagner, James C. Sturm, Naveen Verma:
A Monolithically Integrable Reconfigurable Antenna Based on Large-Area Electronics. 1475-1485 - Wei Xu, Zhijuan Li, Zetao Fang, Bo Wang, Linze Hong, Gai Yang, Su-Ting Han, Xiaojin Zhao, Xiaoyi Wang:
A Sub-5mW Monolithic CMOS-MEMS Thermal Flow Sensing SoC With ±6 m/s Linear Range. 1486-1496 - Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Young-Jun Jeon, Jeeyoung Shin, Woong Choi, Junwon Jeong, Sung-Wan Hong:
A Simultaneous Energy Transferring SIBO Converter Achieving Low Ripple and High Efficiency for AMOLED Applications. 1497-1508 - Chunxiao Hu, Diyang Zheng, Yun Yin, Jie Lin, Yicheng Li, Wei Li, Hongtao Xu:
A Wideband Sliding Digital-IF Quadrature Digital Transmitter for Multimode NB-IoT/BLE Applications. 1509-1520 - Kyeongho Eom, Han-Sol Lee, Minju Park, Seung Min Yang, Jong Chan Choe, Suk-Won Hwang, Young-Woo Suh, Hyung-Min Lee:
A 92%-Efficiency Inductor-Charging Switched-Capacitor Stimulation System With Level-Adaptive Duty Modulation and Offset Charge Balancing. 1521-1531 - Xu Yang, Linhu Zhao, Zhichao Tan, Menglian Zhao, Yong Ding, Wuhua Li, Yan Lu, Wanyuan Qu:
A High-Efficiency Wide Output Range Reconfigurable Capacitive-Sigma DC-DC Converter. 1532-1542 - Junyao Tang, Lei Zhao, Cheng Huang:
A Through-Power-Link Hysteretic-Controlled Capacitive Isolated DC-DC Converter With Enhanced Efficiency and Common-Mode Transient Immunity. 1543-1555 - Lei Zhao, Junyao Tang, Kang Wei, Cheng Huang:
A 4-Phase DAB Current-Mode Hysteretic Controlled Buck Converter With Relaxed Inductor Requirements and Enhanced DC and Dynamic Performance. 1556-1566 - Shuangxing Zhao, Chenchang Zhan, Yan Lu:
A Battery-Input Three-Mode Buck-Boost Hybrid DC-DC Converter With 97.6% Peak Efficiency. 1567-1577 - Farzad Khoeini, Bardia Pezeshki, Emad Afifi, Alex Tselikov, Robert F. Kalman, Bahareh Hadidian, Ehsan Afshari:
Parallel Versus Serial: Design of an Optical Receiver With Integrated Blue Photodetectors and Digitally Tunable Low-End Cutoff Frequency for MicroLED-Based Parallel Interchip Communication. 1578-1591 - Yuanqing Huang, Yogesh Ramadass, Dongsheng Ma:
Design of Direct 48-V/1-V Three-Path Four-State Switching Power Converter With Adaptive VCF Rebalancing and Dual-Edge tdead Modulation. 1592-1602 - Jin-O. Seo, Mingoo Seok, SeongHwan Cho:
A 44.2-TOPS/W CNN Processor With Variation-Tolerant Analog Datapath and Variation Compensating Circuit. 1603-1611 - Jinshan Yue, Yongpan Liu, Xiaoyu Feng, Yifan He, Jingyu Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang, Nan Sun, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang:
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. 1612-1627
Volume 59, Number 6, June 2024
- Saleh Hassanzadehyamchi, Amirreza Alizadeh, Ali M. Niknejad, Omeed Momeni:
A 200-GHz Power Amplifier With 18.7-dBm Psat in 45-nm CMOS SOI: A Model-Based Large-Signal Approach on Cascaded Series-Connected Power Amplification. 1631-1642 - Mohammad Ali Mokri, Soodeh Miraslani, Md. Aminul Hoque, Deukhyoun Heo:
A Dual-Path Transformer-Based Multiband Power Amplifier for mm-Wave 5G Applications. 1643-1655 - Bowen Wang, Woogeun Rhee, Zhihua Wang:
A 65-nm Sub-10-mW Communication/Ranging Quadrature Uncertain-IF IR-UWB Transceiver With Twin-OOK Modulation. 1656-1667 - Mohammad Ali Montazerolghaem, Leo C. N. de Vreede, Masoud Babaie:
A Highly Selective Receiver With Programmable Zeros and Second-Order TIA. 1668-1683 - Pratap Tumkur Renukaswamy, Kristof Vaesen, Nereo Markulic, Jan Craninckx:
A 16-GHz Background-Calibrated Duty-Cycled FMCW Charge-Pump PLL. 1684-1696 - Chuangguo Wang, Xingyu Ma, Wei Li, Fan Chen, Wen Zuo, Yunyou Pu, Jin Zhou, Hongtao Xu:
A Wideband Full-Duplex Receiver With Multi-Domain Self-Interference Cancellation Based on Capacitor Stacking Delay and Delay Compensation in Cancellers. 1697-1708 - Zhenyu Wang, Zhaowu Wang, Yicheng Wang, Xiaochen Tang, Yong Wang:
An SP10T Switch With Reconfigurable Matching and Symmetrical Routing Topologies Functioning From DC to 18 GHz. 1709-1721 - Mengyu Li, Shuang Song, Dehong Wang, Tian Yang, Yu Zheng, Qiuyang Lin, Feijun Zheng, Kai Huang, Zhichao Tan, Menglian Zhao:
A 30-μW 94.7-dB SNDR Noise-Shaping Current-Mode Direct-to-Digital Converter Using Triple-Slope Quantizer for PPG/NIRS Readout. 1722-1734 - Yuanqing Huang, Yingping Chen, Dongsheng Ma:
Enabling Online GaN Power Device Self-Health Monitoring With Analog SGD Supervised Learning and TJ-Independent Precursor Measurement. 1735-1746 - Feiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns. 1747-1758 - Woojoong Jung, Hyunjun Park, Minsu Kim, Hyung-Min Lee:
A 94.9% Efficiency Always-Power-Delivered SIDO Buck Converter With Continuous Current Balancing and Complementary Adaptive-Switching Regulation. 1759-1770 - Xinling Yue, Sundeep Javvaji, Zhong Tang, Kofi A. A. Makinwa, Sijun Du:
A Bias-Flip Rectifier With Duty-Cycle-Based MPPT for Piezoelectric Energy Harvesting. 1771-1781 - Xiaofei Ma, Wing-Hung Ki, Yan Lu:
A 27 W Wireless Power Transceiver With Compact Single-Stage Regulated Class-E Architecture and Adaptive ZVS Control. 1782-1793 - Taewook Kang, Seungjong Lee, Seungheun Song, Mohammad Reza Haghighat, Michael P. Flynn:
A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer. 1794-1808 - Jaehong Jung, Seunghyun Oh, Joomyoung Kim, Jinhyeon Lee, Wonkang Kim, Euiyoung Park, Seungyong Bae, Seungjin Kim, Jaehoon Lee, Yelim Youn, Yeongcheol Jeong, Sungsik Park, Kyungsoo Lee, Yong Lim, Junho Huh, Jongwoo Lee:
A Fully Integrated, Low-Noise, Cost-Effective Single-Crystal-Oscillator-Based Clock Management IC in 28-nm CMOS. 1809-1822 - Yi Tan, Cheng Huang, Hiroki Ishikuro:
Design of Dual Lower Bound Hysteresis Control in Switched-Capacitor DC-DC Converter for Optimum Efficiency and Transient Speed in Wide Loading Range for IoT Application. 1823-1834 - Jincheol Sim, Changmin Sim, Hyunsu Park, Yoonjae Choi, Jonghyuck Choi, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Jong-Min Kim, Ju-Hyung Lee, Young-Chai Ko, Chulwoo Kim:
A 10-Gb/s Wireline Receiver Using Linear Baud-Rate CDR and Analog Equalizer for Free Space Optical Communication Over 10- and 100-m Distances. 1835-1846 - Asaf Feldman, Omer Nechushtan, Joseph Shor:
Voltage Level Detection for Near-VTH Computing. 1847-1857 - Hikmet Çeliker, Florian De Roose, Myriam Willegems, Steve Smout, Wim Dehaene, Kris Myny:
Analysis and Comparison of Logic Architectures for Digital Circuits in a-IGZO Thin-Film Transistor Technologies. 1858-1870 - Xiangyu Mao, Yan Lu, Rui Paulo Martins:
A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator. 1871-1882 - Xu Yang, Chunhe Yao, Lei Kang, Qian Luo, Nan Qi, Runjiang Dou, Shuangming Yu, Peng Feng, Zhongming Wei, Jian Liu, Kaiyou Wang, Nanjian Wu, Liyuan Liu:
A Bio-Inspired Spiking Vision Chip Based on SPAD Imaging and Direct Spike Computing for Versatile Edge Vision. 1883-1898 - Po-Shao Chen, Yen-Lung Chen, Yu-Chi Lee, Zih-Sing Fu, Chia-Hsiang Yang:
A 28.8-mW Accelerator IC for Dark Channel Prior-Based Blind Image Deblurring. 1899-1911 - Guodong Yin, Yiming Chen, Mufeng Zhou, Wenjun Tang, Mingyen Lee, Zekun Yang, Tianyu Liao, Xirui Du, Vijaykrishnan Narayanan, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li:
Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm2 Density in 65-nm CMOS. 1912-1925 - Kyeongho Lee, Joonhyung Kim, Jongsun Park:
A 28-nm 50.1-TOPS/W P-8T SRAM Compute-In-Memory Macro Design With BL Charge-Sharing-Based In-SRAM DAC/ADC Operations. 1926-1937 - Bo Zhang, Jyotishman Saikia, Jian Meng, Dewei Wang, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-Sun Seo, Mingoo Seok:
MACC-SRAM: A Multistep Accumulation Capacitor-Coupling In-Memory Computing SRAM Macro for Deep Convolutional Neural Networks. 1938-1949 - Shanshan Xie, Can Ni, Aseem Sayal, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni:
eDRAM-CIM: Reconfigurable Charge Domain Compute-In-Memory Design With Embedded Dynamic Random Access Memory Array Realizing Adaptive Data Converters. 1950-1961 - Yuncheng Lu, Zehao Li, Tony Tae-Hyoung Kim:
HGRP: A 181-μ W Real-Time Hand Gesture Recognition Processor Based on Bi-Directional Convolution and Iteration-Free Feature Clustering. 1962-1975
Volume 59, Number 7, July 2024
- Filip Tavernier, Danilo Manstretta, Ronan A. R. van der Zee:
Guest Editorial IEEE 2023 European Solid-State Circuits Conference. 1979-1980 - Hongzhuo Liu, Wei Deng, Haikun Jia, Shiwei Zhang, Shiyan Sun, Zhihua Wang, Baoyong Chi:
A Multireference PLL: Theory and Implementation. 1981-1994 - Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A Low-Power High-BW PAM4 VCSEL Driver With Three-Tap FFE in 12-nm CMOS FinFET Process. 1995-2004 - Niccolò de Milleri, Luca Valli, Marc Fueldner, Andreas Wiesbauer, Andrea Baschirotto:
A 22-dBA Digital Optical MEMS Microphone. 2005-2018 - Soyeon Um, Jaehyuk Lee, Hoi-Jun Yoo:
A 3.8-mW 1.9-mΩ/√Hz Electrical Impedance Tomography IC With High Input Impedance and Loading Effect Calibration for 3-D Early Breast Cancer Detect System. 2019-2028 - Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket V. Desai, Ram K. Krishnamurthy, Xin Zhang, Mingoo Seok:
A Ten-Level Series-Capacitor 24-to-1-V DC-DC Converter With Fast In Situ Efficiency Tracking, Power-FET Code Roaming, and Switch Node Power Rail. 2029-2041 - Rob A. Damsteegt, Ramon W. J. Overwater, Masoud Babaie, Fabio Sebastiano:
A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS. 2042-2054 - Arpan Suravi Prasad, Moritz Scherer, Francesco Conti, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine. 2055-2069 - Peter Deaville, Bonan Zhang, Naveen Verma:
A Fully Row/Column-Parallel In-Memory Computing Macro in Foundry MRAM With Differential Readout for Noise Rejection. 2070-2080 - Akash Levy, Luke R. Upton, Michael D. Scott, Dennis Rich, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Boris Murmann, Priyanka Raina:
EMBER: Efficient Multiple-Bits-Per-Cell Embedded RRAM Macro for High-Density Digital Storage. 2081-2092 - Fan Zhang, Amitesh Sridharan, Wangxin He, Injune Yeo, Maximilian Liehr, Wei Zhang, Nathaniel C. Cady, Yu Cao, Jae-Sun Seo, Deliang Fan:
A 65-nm RRAM Compute-in-Memory Macro for Genome Processing. 2093-2104 - Sasank Garikapati, Aravind Nagulu, Igor Kadota, Mostafa Essawy, Tingjun Chen, Shibo Wang, Tanvi Pande, Arun Natarajan, Gil Zussman, Harish Krishnaswamy:
Full-Duplex Receiver With Wideband, High-Power RF Self-Interference Cancellation Based on Capacitor Stacking in Switched-Capacitor Delay Lines. 2105-2120 - Bo Zhou, Yifan Li, Zuhang Wang, Chen Wang, Woogeun Rhee, Zhihua Wang:
A Low-Complexity FM-UWB Transmitter With Digital Reuse and Analog Stacking. 2121-2132 - Yicheng Li, Yun Yin, Diyang Zheng, Fu Gao, Jie Lin, Zhen Hu, Ye Lu, Hongtao Xu:
A Quadrature Digital Power Amplifier With Wide Efficiency Enhancement Coverage and High Dynamic Power Range. 2133-2144 - Tso-Wei Li, Sensen Li, Hossein Miri Lavasani, Hua Wang:
A Highly Linear and Efficient V-Band CMOS Power Amplifier Using Hybrid NMOS/PMOS for Double Nonlinearity Cancellation With Four-Way Distributed-Active-Transformer. 2145-2158 - Jiaxin Lei, Xiliang Liu, Wei Song, Heng Huang, Xiaoyan Ma, Junliang Wei, Milin Zhang:
Design of a Low-Power, High-Data-Rate, and Crystal-Less All-Digital IR-UWB Transmitter for High-Density Neural Implants. 2159-2170 - Masaru Osada, Zule Xu, Zunsong Yang, Tetsuya Iizuka:
A Fractional-N Ring PLL Using Harmonic-Mixer-Based Dual-Feedback and Split-Feedback Frequency Division With Phase-Domain Filtering. 2171-2184 - Dong-Hyun Yoon, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 2.5-GHz Dynamic Performance-Enhanced Nonlinear DAC-Based Direct-Digital Frequency Synthesizer in 65-nm CMOS Process. 2185-2198 - Hao-Hsuan Chang, Ci-Ren Chen, Tai-Cheng Lee:
A 511-μW 89-dB-SNDR Asynchronous SAR-ISDM ADC With Noise Shaping Dynamic Amplifier and Time-Domain Noise-Slicing Technique. 2199-2208 - Mingtao Zhan, Lu Jie, Xiyuan Tang, Yi Zhong, Nan Sun:
A 0.004-mm2 200-MS/s Pipelined SAR ADC With kT/C Noise Cancellation and Robust Ring-Amp. 2209-2218 - Yimai Peng, Seokhyeon Jeong, Kyojin Choo, Yejoong Kim, Li-Yu Chen, Rohit Rothe, Li Xu, Ilya Gurin, Omid Oliaei, Matthew J. Thompson, Stephen Bart, Peter Hartwell, David T. Blaauw, Dennis Sylvester:
An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation. 2219-2235 - Shih-Song Cheng, Paul C.-P. Chao:
An Ultra-High 6318-PPI Pixel Circuit for Micro-OLED Displays With Vth Compensated up to 10-bit Gray Levels. 2236-2247 - Zhen Li, Jing Wang, Man-Kay Law, Sijun Du, Junrui Liang, Xu Cheng, Jun Han, Xiaoyang Zeng, Zhiyuan Chen:
Piezoelectric Energy Harvesting Interface Using Self-Bias-Flip Rectifier and Switched-PEH DC-DC for MPPT. 2248-2259 - Yevgeny Perelman, Zeev Toroker, Daljeet Kumar, Eran Maday, Noam Familia, Tzachi Carbone, Gal Kidron, Idan Mizrahi, Yoni Landau, Rushdy Saba, Yaakov Goldberg, Alon Meisler:
A 116-Gb/s PAM4 0.9-pJ/b Transmitter With Eight-Tap FFE in 5-nm FinFET. 2260-2271 - Xinjian Liu, Sumanth Kamineni, Jacob Breiholz, Benton H. Calhoun, Shuo Li:
A Sub-μW Energy-Performance-Aware IoT SoC With a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization. 2272-2285 - Yuxuan Du, Junyi Qian, Zhengguo Shen, Chengjun Wu, Weiwei Shan, Xi Wang:
DSC-TRCP: Dynamically Self-Calibrating Tunable Replica Critical Paths Based Timing Monitoring for Variation Resilient Circuits. 2286-2296 - Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Ho-Yu Chen, Chen-Hsun Lin, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips. 2297-2309 - Daehyun Kim, Nael Mizanur Rahman, Saibal Mukhopadhyay:
PRESTO: A Processing-in-Memory-Based k-SAT Solver Using Recurrent Stochastic Neural Network With Unsupervised Learning. 2310-2320 - Jonghyun Kim, Hyungil Chae:
A 10-Gb/s True Random Number Generator Using ML-Resistant Middle Square Method. 2321-2329 - Meilin Wan, Zhen Zhang, Yin Zhang, Zhangqing He, Haoshuang Gu, Kui Dai, Xuecheng Zou:
A Chip-PCB Hybrid SC PUF Used for Anti-Desoldering and Depackaging-Attack Protection. 2330-2344
Volume 59, Number 8, August 2024
- Rui Zhang, Dawei Tang, Zhe Chen, Liqun Lu, Si-Yuan Tang, Peigen Zhou, Jixin Chen, Wei Hong:
A D-Band OOK Transmitter With 50-GHz Bandwidth Achieving 32-Gbps Data Rate in 28-nm CMOS. 2347-2361 - Jie Zhou, Bingzheng Yang, Yiyang Shu, Xun Luo:
A Phase-Modulation Phase-Shifting Phased-Array Transmitter With Phase Self-Calibration and Deep PBOs Efficiency Enhancement. 2362-2377 - Yunzhao Nie, Woogeun Rhee, Zhihua Wang:
An IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65-nm CMOS. 2378-2389 - Xun Luo, Bingzheng Yang, Zhixian Deng, Wen Chen, Yiyang Shu, Jie Zhou:
A Phased-Array Transceiver With 2-Dimension Continuously Auto Link-Tracking Operation and Time Division Modulator. 2390-2406 - Gaofeng Jin, Fei Feng, Wen Chen, Yiyang Shu, Xun Luo, Xiang Gao:
A Fractional-N Sampling PLL With a Merged Constant-Slope DTC and Sampling PD. 2407-2417 - Ziyang Luo, Jin Liu, Hoi Lee:
A High-Efficiency 40.68-MHz Single-Stage Dual-Output Regulating Rectifier With ZVS and Synchronous PFM Control for Wireless Powering. 2418-2429 - Qiuzhen Xu, Gen Li, Yanyan Liu, Feng Luo, Zhiming Xiao:
A 64-Channel Inverter-Based Neural Signal Recording Amplifier With a Novel Differential-Like OTA Achieving an NEF of 0.84. 2430-2440 - Qixiu Wu, Wei Deng, Yaqian Sun, Haikun Jia, Hongzhuo Liu, Shiwei Zhang, Zhihua Wang, Baoyong Chi:
An Enhanced Class-F Dual-Core VCO With Common-Mode-Noise Self-Cancellation and Isolation Technique. 2441-2454 - Weisen Zeng, Li Gao, Ningzheng Sun, Hui-Yang Li, Jin-Xu Xu, Hongtao Xu, Quan Xue, Xiuyin Zhang:
A Compact 19.7- to 43.8-GHz Power Amplifier With 20.3-dBm Psat and 35.5% PAE in 28-nm Bulk CMOS. 2455-2468 - Kaizhe Guo, Chi Hou Chan:
A 0.68-THz Receiver With Third-Order Subharmonic Mixing in 65-nm CMOS. 2469-2480 - Jae-Hyun Chung, Ye-Dam Kim, Chang-Un Park, Kun-Woo Park, Dong-Ryeol Oh, Min-Jae Seo, Seung-Tak Ryu:
A 1.5-MHz BW 81.2-dB SNDR Dual-Residue Pipeline ADC With a Fully Dynamic Noise-Shaping Interpolating-SAR ADC. 2481-2491 - Mohamed Megahed, Yusang Chun, Zhiping Wang, Tejasvi Anand:
An SNR-Enhanced 8-Ary (SNRE-8) Modulation Technique for Wireline Transceivers Using Pulse Width, Position, and Amplitude Modulation. 2492-2505 - Woohyun Kwon, Hyosup Won, Taeho Kim, Sejun Jeon, Soon-Won Kwon, Ha-Il Song, Hanho Choi, Bongjin Kim, Huxian Jin, Jun-Gi Jo, Woosang Han, Tai-Young Kim, Gain Kim, Jake Eu, Jinho Park, Hyeon-Min Bae:
A 26-Gb/s Framed-Pulsewidth Modulation Transceiver for Extended Reach Optical Links. 2506-2517 - Jincheol Sim, Jonghyuck Choi, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Hwaseok Shin, Junseob So, Seonbeen Lee, Chulwoo Kim:
A Wireline Transceiver With 3-bit per Symbol Using Common-Mode NRZ and Differential-Mode PAM-4 Signaling Techniques. 2518-2528 - Jeong-Hyun Cho, Hong-Hyun Bae, Gyu-Wan Lim, Tae-Hwang Kong, Jun-Hyeok Yang, Hyun-Sik Kim:
A Fully Integrated Multi-Phase Voltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling Gate Driver. 2529-2544 - Lei Zhao, Junyao Tang, Xin Zhang, Kang Wei, Raveesh Magod, Cheng Huang:
A 96.1% Efficiency Single-Inductor Multiple-Output (SIMO) Buck Converter With 2.1-A/ns Transient Speed and 2.2-A Maximum Current Capacity. 2545-2556 - Yang Liu, Yuan Yao, Wing-Hung Ki:
A 13.56-MHz Single-Input Dual-Output Wireless Power and Data Transfer System for Bio-Implants. 2557-2567 - Hongkyun Kim, Yechan Park, Changhoon Sung, Jaeouk Cho, Seongjun Park, Chul Kim:
DiTTO: A Distance Adaptive Over 100-mW Wireless Power Transfer System With 1.695-Mb/s Uplink Telemetry and a Shared Inductor Two-Output Regulating Rectification. 2568-2580 - Sheng-Hsi Hung, Tz-Wun Wang, Si-Yi Li, Wei-Chien Hung, Ya-Ting Hsu, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A High Common-Mode Transient Immunity GaN-on-SOI Gate Driver With Quad-Drive Control Technique for High dV/dt 1700-V SiC Power Switch. 2581-2590 - Yili Shen, Changgui Yang, Yunshan Zhang, Weixiao Wang, Yuxuan Luo, Chaonan Yu, Kedi Xu, Gang Pan, Bo Zhao:
A Battery-Free Neural-Recording Chip Achieving 5.5 cm Fully-Implanted Depth by Galvanically-Switching Passive Body Channel Communication. 2591-2603 - Peng Guo, Fabian Fool, Zu-Yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Nico de Jong, Martin D. Verweij, Michiel A. P. Pertijs:
A 125 μ m-Pitch-Matched Transceiver ASIC With Micro-Beamforming ADC and Multi-Level Signaling for 3-D Transfontanelle Ultrasonography. 2604-2617 - Yekan Chen, Tianyi Cai, Yonghong Kuang, Jiaqi Dong, Zipeng Cheng, Bo Zhao, Yuxuan Luo:
A Fully Dynamic Event-Driven Capacitive Sensor Interface Circuits Based on Self-Reconfigurable SAR Capacitance-to-Digital Conversion for High-Density Robotic Tactile Sensing. 2618-2629 - Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu:
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. 2630-2643 - Qirui Zhang, Zichen Fan, Hyochan An, Zhehong Wang, Ziyun Li, Guanru Wang, Pierre Abillama, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM. 2644-2658 - Yuqi Su, Tony Tae-Hyoung Kim, Bongjin Kim:
FlexSpin: A CMOS Ising Machine With 256 Flexible Spin Processing Elements With 8-b Coefficients for Solving Combinatorial Optimization Problems. 2659-2670 - Jaehoon Heo, Jung-Hoon Kim, Wontak Han, Jaeuk Kim, Joo-Young Kim:
SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator With Local Error Prediction for Area/Energy-Efficient On-Device Learning. 2671-2683 - Chuan-Tung Lin, Paul Xuanyuanliang Huang, Jonghyun Oh, Dewei Wang, Mingoo Seok:
iMCU: A 28-nm Digital In-Memory Computing-Based Microcontroller Unit for TinyML. 2684-2693 - Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo:
Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation. 2694-2705 - Junjie Mu, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim:
A Scalable and Reconfigurable Bit-Serial Compute-Near-Memory Hardware Accelerator for Solving 2-D/3-D Partial Differential Equations. 2706-2716 - Jilin Zhang, Dexuan Huo, Jian Zhang, Chunqi Qian, Qi Liu, Liyang Pan, Zhihua Wang, Ning Qiao, Kea-Tiong Tang, Hong Chen:
ANP-I: A 28-nm 1.5-pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-0.1-μ J/Sample On-Chip Learning for Edge-AI Applications. 2717-2729
Volume 59, Number 9, September 2024
- Lingxin Meng, Junsheng Chen, Menglian Zhao, Zhichao Tan:
A Partially Feedback NSSAR Embedded Third-Order Delta-Sigma Modulator With Gain-Boosted Two-Stage FIAs. 2735-2746 - Martin Lee, Motaz M. Elbadry, Kambiz Moez:
A 300-μW 2.4-GHz PVT-Insensitive Subthreshold Reference-Based LNA. 2747-2760 - Cong Tao, Liangbo Lei, Chaoyang Zheng, Yumei Huang, Zhiliang Hong, Xiaoyang Zeng:
A Low-Power, Compact, 0.1-5.5-GHz, 40-dBm IB OIP3 LNTA-First Receiver for SDR. 2761-2773 - Xiaoyu Shan, Dongsheng Liu, Ang Hu, Zirui Jin, Jiahao Lu, Aobo Li, Kai Li, Xuecheng Zou:
A Low-Phase-Noise Wide-Tuning-Range Mode-Switching Oscillator Using Multi-Magnetic-Coupling and Active-Source-Degenerating Techniques. 2774-2787 - Wooram Lee, Caglar Ozdag, Jean-Olivier Plouchart, Alberto Valdes-Garcia, Bodhisatwa Sadhu:
A 24 to 30-GHz Phased Array Transceiver Front End With 2.8 to 3.1-dB RX NF and 22 to 24% TX Peak Efficiency. 2788-2804 - Robin Ying, Alyosha C. Molnar:
Design of High Dynamic Range HBT N-Path Receivers With Dual-Resonant-Mode LO Drive. 2805-2817 - Aditya Narayanan, Abhishek Bhat, Nagendra Krishnapura:
A 6 to 12-GHz Fractional-N Frequency Synthesizer With a Digital Technique to Counter Modulus-Dependent Feedback Divider Delays. 2818-2830 - Xuyang Lu, Suresh Venkatesh, Bingjun Tang, Kaushik Sengupta:
Physical Layer Security Through Directional Modulation With Spatio-Temporal Millimeter-Wave Transmitter Arrays. 2831-2847 - Cong Wei, Rongshan Wei, Lijie Huang, Gongxing Huang, Jinze Lai, Zhichao Tan:
An Energy-Efficient Discrete-Time Delta-Sigma Modulator With Dynamic-Range Enhancement and Tri-Level CDAC. 2848-2857 - Jonah Van Assche, Georges G. E. Gielen:
Analysis and Design of a 10.4-ENOB 0.92-5.38-μW Event-Driven Level-Crossing ADC With Adaptive Clocking for Time-Sparse Edge Applications. 2858-2869 - David Dolt, Samuel Palermo:
A Radiation-Hardened 15-22-GHz Frequency Synthesizer in 22-nm FinFET. 2870-2883 - Job van Staveren, Pinakin Padalia, Edoardo Charbon, Carmen G. Almudéver, Giordano Scappucci, Masoud Babaie, Fabio Sebastiano:
Cryo-CMOS Voltage References for the Ultrawide Temperature Range From 300 K Down to 4.2 K. 2884-2894 - Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics. 2895-2906 - Christos G. Adamopoulos, Hyeong-Seok Oh, Sidney Buchbinder, Panagiotis G. Zarkos, Pavan Bhargava, Asmaysinh Gharia, Ali M. Niknejad, Mekhail Anwar, Vladimir Stojanovic:
Monolithic Electronic-Biophotonic System-on-Chip for Label-Free Real-Time Molecular Sensing. 2907-2921 - Tianqi Lu, Kofi A. A. Makinwa, Sijun Du:
A Single-Stage Dual-Output Regulating Voltage Doubler for Wireless Power Transfer. 2922-2933 - Min Liu, Ziteng Cai, Zhe Wang, Shaohua Zhou, Man-Kay Law, Jian Liu, Jianguo Ma, Nanjian Wu, Liyuan Liu:
A 3 THz CMOS Image Sensor. 2934-2947 - Il-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo:
A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET. 2948-2959 - Junyi Ruan, Junmin Jiang, Chenzhou Ding, Yunxiao Li, Yanhui Wu, Ka Nang Leung, Xun Liu:
A 2.8 μs Response Time 95.1% Efficiency Hybrid Boost Converter With RHP Zero Elimination for Fast-Transient Applications. 2960-2970 - Jaekwang Yun, Sang-Yoon Lee, Jaewook Kim, Joo-Hyung Chae, Suhwan Kim, Yong-Un Jeong:
A Single-Ended Impedance-Matched Transmitter With Single Ring-Oscillator-Based Time-Domain ZQ Calibration for Memory Interfaces. 2971-2982 - Chenyu Huang, Chenchang Zhan, Xianglong Bai, Yan Lu:
A Single-Stage Bipolar-Output Regulating Rectifier With Negligible Cross-Regulation for Wireless Display. 2983-2994 - Zhaobo Zhang, Chenchang Zhan, Shuangxing Zhao, Man-Kay Law:
A High-Efficiency Low-Cost Multi-Antenna Energy Harvesting System With Leakage Suppression. 2995-3007 - Liping Zhong, Hongzhi Wu, Weitao Wu, Catherine Wang, Wenbo Xiao, Xiongshi Luo, Yangyi Zhang, Dongfan Xu, Wei Wang, Taiyang Fan, Zhenghao Li, Xuxu Cheng, Quan Pan:
A 2×56 Gb/s 0.78-pJ/b PAM-4 Crosstalk Cancellation Receiver With Active Crosstalk Extraction Technique in 28-nm CMOS. 3008-3020 - Yuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Minglei Zhang, Rui Paulo Martins, Pui-In Mak:
FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm2 Analog Compute-in-Memory Macro. 3021-3031 - An Guo, Chen Xi, Fangyuan Dong, Xingyu Pu, Dongqi Li, Jingmin Zhang, Xueshan Dong, Hui Gao, Yiran Zhang, Bo Wang, Jun Yang, Xin Si:
A 28-nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs. 3032-3044 - Bastien Giraud, Sebastien Ricavy, Cyrille Laffond, Ilan Sever, Valentin Gherman, Florent Lepin, Mariam Diallo, Khadija Zenati, Sylvain Dumas, Olivier Guille, Maxim Vershkov, Alessandro Bricalli, Giuseppe Piccolboni, Jean-Philippe Noel, Anass Samir, Gaël Pillonnet, Yvain Thonnart, Gabriel Molas:
Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro. 3045-3057 - Paul Xuanyuanliang Huang, Yannis P. Tsividis, Mingoo Seok:
INTIACC: A Programmable Floating- Point Accelerator for Partial Differential Equations. 3058-3069 - Xiaoyu Feng, Wenyu Sun, Chen Tang, Xinyuan Lin, Jinshan Yue, Huazhong Yang, Yongpan Liu:
A 28-nm Energy-Efficient Sparse Neural Network Processor for Point Cloud Applications Using Block-Wise Online Neighbor Searching. 3070-3081 - Ruoyang Liu, Chenhan Wei, Yixiong Yang, Wenxun Wang, Binbin Yuan, Huazhong Yang, Yongpan Liu:
A Dynamic Execution Neural Network Processor for Fine-Grained Mixed-Precision Model Training Based on Online Quantization Sensitivity Analysis. 3082-3093 - Yifeng Zhou, Guocheng Su, Jinrong Zhou, Lei Liao, Zhuojun Chen:
A Compute-in-Memory Annealing Processor With Interaction Coefficient Reuse and Sparse Energy Computation for Solving Combinatorial Optimization Problems. 3094-3105 - Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan:
An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks. 3106-3116
Volume 59, Number 10, October 2024
- Ken Takeuchi, Tetsuya Iizuka, Kazuko Nishimura, Jerald Yoo:
Guest Editorial: Introduction to the Special Section on the 2023 Asian Solid-State Circuits Conference (A-SSCC). 3119-3122 - Pingda Guan, Ruichang Ma, Haikun Jia, Wei Deng, Mingxing Deng, Jiamin Xue, Angxiao Yan, Shiyan Sun, Qiuyu Peng, Teerachot Siriburanon, Robert Bogdan Staszewski, Zhihua Wang, Baoyong Chi:
A Fully Integrated QPSK/16-QAM D-Band CMOS Transceiver With Mixed-Signal Baseband Circuitry Realizing Digital Interfaces. 3123-3141 - Mengru Yang, Dixian Zhao, Chenyu Xu, Peng Gu, Yongran Yi, Mohan Guo, Xiangxi Yan, Liangliang Liu, Yuan Chai, Huiqi Liu, Xiaohu You:
K/Ka-Band Hybrid-Packaged Four-Element Four-Beam Phased-Array Transmitter and Receiver Front-Ends With Optimized Beamforming Passive Networks. 3142-3155 - Chenyu Xu, Xiaofei Liao, Mengru Yang, Feifan Hong, Peijuan Ju, Wendi Chen, Pengfei Diao, Hao Gong, Xiang Liu, Xiaohu You, Dixian Zhao:
A Packaged 54-to-69-GHz Wideband 2T2R FMCW Radar Transceiver Employing Cascaded-PLL Topology and PTAT-Enhanced Temperature Compensation in 40-nm CMOS. 3156-3171 - Xiangrong Huang, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi:
A Compact E-Band Load-Modulation Balanced Power Amplifier in 65-nm CMOS. 3172-3182 - Gengzhen Qi, Haonan Guo, Yunchu Li, Pui-In Mak:
A BW-Extended Fourth-Order Gain-Boosted N-Path Filter Employing a Switched gₘ-C Network. 3183-3191 - Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction. 3192-3203 - Hyun-Su Lee, Hyung-Min Lee:
A 92.7%-Efficiency 6.78-MHz Energy-Resuscitating Resonant Regulating Rectifier With Dual Outputs for Wirelessly Powered Devices. 3204-3217 - Xiaodong Meng, Xing Li, Chi-Ying Tsui, Wing-Hung Ki, Weiqiang Liu:
A 13.56-MHz Primary Driver With Fractional Capacitance Auto-Tuning Loop for Wireless-Powered Implantable Medical Devices. 3218-3231 - Dong-Hun Lee, Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu:
A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma Modulator With Digital Noise Coupling. 3232-3241 - Changjoo Park, Jeongmyeong Kim, Kyounghun Kang, Minkyu Yang, Byeongmin Moon, Siheon Lee, Wanyeong Jung:
A High-Resolution Pipelined-SAR ADC Using Cyclically Charged Floating Inverter Amplifier. 3242-3252 - Yongjo Kim, Taekwang Jang, SeongHwan Cho:
A Jitter Programmable Digital Bang-Bang PLL Using PVT-Invariant Stochastic Jitter Monitor. 3253-3262 - Han Liu, Zhihan Zhang, Ye Liu, Daigao Chen, Donglai Lu, Jian He, Guike Li, Min Liu, Ziyue Dang, Xi Xiao, Nan Qi:
A 4×112 Gb/s PAM-4 Silicon-Photonic Transmitter and Receiver Chipsets for Linear-Drive Co-Packaged Optics. 3263-3276 - Chenyang Zhao, Jinbei Fang, Xiaoli Huang, Deyang Chen, Zhiwang Guo, Jingwen Jiang, Jiawei Wang, Jianguo Yang, Jun Han, Peng Zhou, Xiaoyong Xue, Xiaoyang Zeng:
A 28-nm 36 Kb SRAM CIM Engine With 0.173 μm2 4T1T Cell and Self-Load-0 Weight Update for AI Inference and Training Applications. 3277-3289 - Yujie Geng, Haichuan Lin, Bo Wang, Cheng Wang:
Cryo-CMOS Dual-Qubit Homodyne Reflectometer Array With Degenerate Parametric Amplification. 3290-3306 - Jinook Jung, Jun-Han Choi, Kyoung-Jun Roh, Jaewoo Park, Won-Mook Lim, Tae-Sung Kim, Han-Ki Jeong, Myoungbo Kwak, Jaeyoun Youn, Jeong-Don Ihm, Changsik Yoo, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko:
A 4 ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3. 3307-3316 - Ruiqi Guo, Xiaofeng Chen, Lei Wang, Yang Wang, Hao Sun, Jingchuan Wei, Huiming Han, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
CIMFormer: A Systolic CIM-Array-Based Transformer Accelerator With Token-Pruning-Aware Attention Reformulating and Principal Possibility Gathering. 3317-3329 - Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo:
LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor With Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell. 3330-3341 - Yubin Qin, Yang Wang, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Yang Zhou, Yuanqi Fan, Jingchuan Wei, Tianbao Chen, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
Ayaka: A Versatile Transformer Accelerator With Low-Rank Estimation and Heterogeneous Dataflow. 3342-3356 - Tzu-Wei Tong, Tai-Jung Chen, Yi-Yen Hsieh, Chia-Hsiang Yang:
A 73.8k-Inference/mJ SVM Learning Accelerator for Brain Pattern Recognition. 3357-3365 - Xiang'ao Qi, Xiangting Li, Yuqing Lou, Yongfu Li, Guoxing Wang, Kea-Tiong Tang, Jian Zhao:
A 0.67-to-5.4 TSOPs/W Spiking Neural Network Accelerator With 128/256 Reconfigurable Neurons and Asynchronous Fully Connected Synapses. 3366-3377 - Yaolong Hu, Xiaohan Zhang, Taiyun Chi:
A 28-GHz Hybrid Beamforming Transmitter With Spatial Notch Steering Enabling Concurrent Dual Data Streams for 5G MIMO Applications. 3378-3391 - Kejie Hu, Kaixue Ma, Zonglin Ma, Keping Wang:
A Reusable Superheterodyne Dual-Band Down-Conversion Mixer With Hybrid Linearity-Enhanced Technique for 5G Non-Contiguous Multiband NR. 3392-3405 - Ningzheng Sun, Li Gao, Hui-Yang Li, Jin-Xu Xu, Xiuyin Zhang:
A Compact Millimeter-Wave Reconfigurable Dual-Band LNA With Image-Rejection in 28-nm Bulk CMOS for 5G Applications. 3406-3416 - Mohammadreza Zeinali, Szu-Yao Hung, Sudhakar Pamarti:
Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation. 3417-3431 - Seongcheol Kim, Jincheol Sim, Yoonjae Choi, Jonghyuck Choi, Youngwook Kwon, Seungwoo Park, Changmin Sim, Junseob So, Taehyeong Park, Chulwoo Kim:
Single-Ended PAM-4 Transmitters With Data Bus Inversion and ZQ Calibration for High-Speed Memory Interfaces. 3432-3443 - Hyunjin Kim, Taehyeong Park, Inho Park, ChangHun Park, Seokjin Kim, Seokhee Han, Junwon Jeong, Chulwoo Kim:
A Fully Integrated Nine-Ratio Switched-Capacitor Converter With Overlapped-Conversion-Ratio Modulation for IoT Applications. 3444-3456 - Dongfang Pan, Aoyang Li, Wei Sun, Lin Cheng:
An Isolated DC-DC Converter Using a Cross-Coupled Shoot-Through-Free Class-D Oscillator With Low EMI Emissions. 3457-3467 - Aoyang Zhang, Daniel Krüger, Behdad Aghelnejad, Guang Yang, Henry Hinton, Yi-Qiao Song, Donhee Ham:
A Portable Wideband CMOS NMR Spectrometer for Multinuclear Molecular Fingerprinting. 3468-3478 - Hyun-A. Ahn, Yoo-Chang Sung, Yong-Hun Kim, Janghoo Kim, Kihan Kim, Dong-Hun Lee, Young-Gil Go, Jae-Woo Lee, Jae-Woo Jung, Yong-Hyun Kim, Garam Choi, Jun-Seo Park, Bo-Hyeon Lee, Jin-Hyeok Baek, Daesik Moon, Joo-Youn Lim, Daihyun Lim, Seung-Jun Bae, Tae-Young Oh:
A 1.01-V 8.5-Gb/s/pin 16-Gb LPDDR5x SDRAM With Advanced I/O Circuitry for High-Speed and Low-Power Applications. 3479-3487 - Zichen Fan, Qirui Zhang, Hyochan An, Boxun Xu, Li Xu, Chien-Wei Tseng, Yimai Peng, Andrea Bejarano-Carbo, Pierre Abillama, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices. 3488-3501
Volume 59, Number 11, November 2024
- Dennis Sylvester:
New Associate Editor. 3507 - Jun-Chau Chien, Rabia Tugce Yazicigil:
Guest Editorial Introduction to the Special section on the 2024 IEEE International Solid-State Circuits Conference (ISSCC). 3508-3510 - Yousung Park, Gyeong-Gu Kang, Gyu-Wan Lim, Seunghwa Shin, Yong-Sung Ahn, Wonyoun Kim, Hyun-Sik Kim:
A 10-bit Source-Driver IC With Charge-Modulation DAC for Enhanced Frame-Rate Mobile OLED Displays. 3511-3524 - Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang:
A 256 × 192 -Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging. 3525-3537 - Haidam Choi, Song-I Cheon, Gichan Yun, Sein Oh, Ji-Hoon Suh, Sohmyung Ha, Minkyu Je:
A Bio-Impedance Readout IC With Complex-Domain Noise-Correlated Baseline Cancellation. 3538-3548 - Jiahao Liu, Xiao Liu, Xu Wang, Ziyi Xie, Chaozheng Guo, Zirui Zhong, Jiajing Fan, Hui Qiu, Yiming Xu, Huajing Qin, Yu Long, Yuhong Zhou, Zixuan Shen, Liang Zhou, Liang Chang, Shanshan Liu, Shuisheng Lin, Chao Wang, Jun Zhou:
A High Accuracy and Ultra-Energy-Efficient Zero-Shot-Retraining Seizure Detection Processor. 3549-3565 - Mohammad Ali Shaeri, Uisub Shin, Amitabh Yadav, Riccardo Caramellino, Gregor Rainer, Mahsa Shoaran:
A 2.46-mm2 Miniaturized Brain-Machine Interface (MiBMI) Enabling 31-Class Brain-to-Text Decoding. 3566-3579 - Micah Roschelle, Rozhan Rabbani, Surin Gweon, Rohan Kumar, Alec Vercruysse, Nam Woo Cho, Matthew H. Spitzer, Ali M. Niknejad, Vladimir Marko Stojanovic, Mekhail Anwar:
A Wireless, Multicolor Fluorescence Image Sensor Implant for Real-Time Monitoring in Cancer Therapy. 3580-3598 - Wei Wang, Zhanghao Yu, Yiwei Zou, Joshua E. Woods, Prahalad Chari, Yumin Su, Jacob T. Robinson, Kaiyuan Yang:
Omnidirectional Wireless Power Transfer for Millimetric Magnetoelectric Biomedical Implants. 3599-3611 - Kareem Rashed, Aswin Chowdary Undavalli, Shantanu Chakrabartty, Aravind Nagulu, Arun Natarajan:
A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing. 3612-3626 - Niels Fakkel, Luc Enthoven, Jiwon Yun, Margriet van Riggelen, Hendrik Benjamin van Ommen, Kai-Niklas Schymik, Hans Bartling, Eftychia Tsapanou Katranara, René Vollmer, Tim Taminiau, Masoud Babaie, Fabio Sebastiano:
A Cryo-CMOS Controller With Class-DE Driver and DC Magnetic-Field Tuning for Quantum Computers Based on Color Centers in Diamond. 3627-3643 - Kaijie Ding, Vojkan Vidojkovic, Dusan M. Milosevic, Khaled Khalaf, Rainier van Dommele, Mark J. Bentum, Peter G. M. Baltus:
A 23-GHz TX/LNA Front-End Module for Inter-Satellite Links With 27.8% Peak Efficiency in the TX Path and 3.1-dB NF in the RX Path. 3644-3654 - Xibi Chen, Nathan M. Monroe, Georgios C. Dogiamis, Robert Stingel, Preston Myers, Ruonan Han:
A 265-GHz CMOS Reflectarray With 98×98 Elements for 1°-Wide Beam Forming and High-Angular-Resolution Radar Imaging. 3655-3669