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Link to original content: https://dblp.org/db/conf/codes/codes2011.html
dblp: International Conference on Hardware Software Codesign and System Synthesis 2011

CODES+ISSS 2011: Taipei, Taiwan

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Keynote address

Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends

Flexible design of architectures and virtual machines

Do you handle data efficiently?

Design and architecture for dependable embedded systems

Control your memory

Mapping of applications to MPSoCs

Tools and algorithms for exploration and synthesis of distributed embedded systems

Reliability, energy, and buffering in real-time systems

Thermal issues in timing variability, power budgeting, and 3D

Modeling and controlling MPSoCs and NoCs

Reliability boosting layers for robust embedded systems

Energy and entropy

Efficient simulation and debugging techniques

Emerging non-volatile memories: opportunities and challenges

Microfluidic biochips: recent research and emerging challenges

Configurations, hints, and management strategies for special-purpose processors

Tutorial 1

Tutorial 2

Industry keynote & panel