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Link to original content: https://dblp.dagstuhl.de/rec/journals/vlsi/ZhangZ00.rdf
Yanjun Zhang and Si-Qing Zheng: An Efficient Parallel VLSI Sorting Architecture. (2000) journals/vlsi/ZhangZ00 10.1155/2000/14617 An Efficient Parallel VLSI Sorting Architecture. 2 Yanjun Zhang 1 Si-Qing Zheng 2 137-147 VLSI Design VLSI Design 11 2 2000 provenance information for RDF data of dblp record 'journals/vlsi/ZhangZ00' 2023-05-08T17:16:36+0200