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Link to original content: https://dblp.dagstuhl.de/rec/journals/darts/RestucciaPBMB20.xml
Francesco Restuccia 0002 Marco Pagani Alessandro Biondi 0001 Mauro Marinoni Giorgio C. Buttazzo Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs (Artifact). 04:1-04:3 2020 6 Dagstuhl Artifacts Ser. 1 https://doi.org/10.4230/DARTS.6.1.4 db/journals/darts/darts6.html#RestucciaPBMB20