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Eiichi Takahashi
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2010 – 2019
- 2019
- [c24]Hisatoshi Yamaoka, Kota Itakura, Eiichi Takahashi, Gaku Nakagawa, Julius Michaelis, Yasuhiko Kanemasa, Miwa Ueki, Tatsuro Matsumoto, Riichiro Take, Sayuri Tanie, Daigo Inoue:
Dracena: A Real-Time IoT Service Platform Based on Flexible Composition of Data Streams. SII 2019: 596-601 - 2017
- [j5]Hirokazu Nosato, Hidenori Sakanashi, Eiichi Takahashi, Masahiro Murakawa, Hiroshi Aoki, Ken Takeuchi, Yasuo Suzuki:
Image Retrieval Method for Multiscale Objects from Optical Colonoscopy Images. Int. J. Biomed. Imaging 2017: 7089213:1-7089213:13 (2017) - 2015
- [c23]Yohei Akiyama, Yuji Kasai, Masaya Iwata, Eiichi Takahashi, Fumiaki Sato, Masahiro Murakawa:
Anomaly Detection of Solar Power Generation Systems Based on the Normalization of the Amount of Generated Electricity. AINA 2015: 294-301 - [c22]Hirokazu Nosato, Hidenori Sakanashi, Eiichi Takahashi, Masahiro Murakawa:
Method of retrieving multi-scale objects from optical colonoscopy images based on image-recognition techniques. BioCAS 2015: 1-4 - [c21]Hirokazu Nosato, Hidenori Sakanashi, Eiichi Takahashi, Masahiro Murakawa:
A content-based image retrieval method for optical colonoscopy images based on image recognition techniques. Medical Imaging: Computer-Aided Diagnosis 2015: 94141E - 2014
- [c20]Hirokazu Nosato, Hidenori Sakanashi, Eiichi Takahashi, Masahiro Murakawa:
An objective evaluation method of ulcerative colitis with optical colonoscopy images based on higher order local auto-correlation features. ISBI 2014: 89-92 - [c19]Jia Qu, Hirokazu Nosato, Hidenori Sakanashi, Eiichi Takahashi, Kensuke Terai, Nobuyuki Hiruta:
Computational cancer detection of pathological images based on an optimization method for color-index local auto-correlation feature extraction. ISBI 2014: 822-825 - 2013
- [c18]Masaya Iwata, Yuji Kasai, Eiichi Takahashi, Masahiro Murakawa:
A Malfunction Detection Method for Individual Photovoltaic Modules. SMARTGREENS 2013: 179-184
2000 – 2009
- 2008
- [c17]Hirotaka Nosato, Yukari Ishida, Tatsumi Furuya, Eiichi Takahashi, Masahiro Murakawa, Isamu Kajitani, Tetsuya Higuchi:
World-Wide Accessible LDPC Encoder/Decoder Generator Using Web-Based GUI and API. CIMCA/IAWTIC/ISE 2008: 627-632 - [c16]Tatsuya Susa, Masahiro Murakawa, Eiichi Takahashi, Tatsumi Furuya, Tetsuya Higuchi:
Post-Fabrication Clock-Timing Adjustment for Digital LSIs Ensuring Operational Timing Margins. HIS 2008: 907-910 - [c15]Yukari Ishida, Hirotaka Nosato, Eiichi Takahashi, Masahiro Murakawa, Isamu Kajitani, Tatsumi Furuya, Tetsuya Higuchi:
Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation. ICES 2008: 237-248 - 2007
- [c14]Tetsuaki Matsunawa, Hirokazu Nosato, Hidenori Sakanashi, Masahiro Murakawa, Eiichi Takahashi, Tsuneo Terasawa, Toshihiko Tanaka, Osamu Suga, Tetsuya Higuchi:
Adaptive Optical Proximity Correction Using an Optimization Method. CIT 2007: 853-860 - [c13]Yosuke Iijima, Masahiro Murakawa, Yuji Kasai, Eiichi Takahashi, Tetsuya Higuchi:
Proposal of transmission line modeling using multi-objective optimization techniques. IEEE Congress on Evolutionary Computation 2007: 2094-2100 - 2006
- [j4]Yuji Kasai, Kiyoshi Miyashita, Hidenori Sakanashi, Eiichi Takahashi, Masaya Iwata, Masahiro Murakawa, Kiyoshi Watanabe, Yukihiro Ueda, Kaoru Takasuka, Tetsuya Higuchi:
An Image Rejection Mixer with AI-Based Improved Performance for WCDMA Applications. IEICE Trans. Electron. 89-C(6): 717-724 (2006) - [p1]Eiichi Takahashi, Yuji Kasai, Masahiro Murakawa, Tetsuya Higuchi:
Post-Fabrication Clock-Timing Adjustment Using Genetic Algorithms. Evolvable Hardware 2006: 65-84 - 2005
- [c12]Yuji Kasai, Eiichi Takahashi, Masaya Iwata, Yosuke Iijima, Hidenori Sakanashi, Masahiro Murakawa, Tetsuya Higuchi:
Adaptive Waveform Control in a Data Transceiver for Multi-speed IEEE1394 and USB Communication. ICES 2005: 198-204 - 2004
- [j3]Eiichi Takahashi, Yuji Kasai, Masahiro Murakawa, Tetsuya Higuchi:
Post-fabrication clock-timing adjustment using genetic algorithms. IEEE J. Solid State Circuits 39(4): 643-650 (2004) - [c11]Masahiro Murakawa, Eiichi Takahashi, Tatsuya Susa, Tetsuya Higuchi:
Post-fabrication clock timing adjustment for digital LSIs with genetic algorithms ensuring timing margins. SMC (4) 2004: 3670-3674 - 2003
- [j2]Masahiro Murakawa, Toshio Adachi, Yoshihiro Niino, Yuji Kasai, Eiichi Takahashi, Kaoru Takasuka, Tetsuya Higuchi:
An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions. IEEE J. Solid State Circuits 38(3): 495-502 (2003) - [c10]Eiichi Takahashi, Masahiro Murakawa, Yuji Kasai, Tetsuya Higuchi:
Power Dissipation Reductions with Genetic Algorithms. Evolvable Hardware 2003: 111-116 - 2002
- [c9]Masahiro Murakawa, Toshio Adachi, Yoshihiro Nino, Eiichi Takahashi, Yuji Kasai, Kaoru Takasuka, Tetsuya Higuchi:
An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions. CICC 2002: 345-348 - 2000
- [c8]Neil Marston, Eiichi Takahashi, Masahiro Murakawa, Yuji Kasai, Tetsuya Higuchi, Toshio Adachi, Kaoru Takasuka:
An Evolutionary Approach to GHz Digital Systems. Evolvable Hardware 2000: 125-132
1990 – 1999
- 1999
- [j1]Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu:
Real-world applications of analog and digital evolvable hardware . IEEE Trans. Evol. Comput. 3(3): 220-235 (1999) - 1998
- [c7]Prashant R. Chandra, Allan Fisher, Corey Kosak, T. S. Eugene Ng, Peter Steenkiste, Eiichi Takahashi, Hui Zhang:
Darwin: Customizable Resource Management for Value-Added Network Services. ICNP 1998: 177-188 - 1997
- [c6]Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi:
CODA-R: a reconfigurable testbed for real-time parallel computation. RTCSA 1997: 252-259 - 1995
- [c5]Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi:
Performance comparison of real-time architectures using simulation. RTCSA 1995: 150- - 1994
- [c4]Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi:
The Execution Model and the Architecture for Real-Time Parallel Systems. IFIP Congress (1) 1994: 177-182 - [c3]Shigeru Kusakabe, Eiichi Takahashi, Rin-Ichiro Taniguchi, Makoto Amamiya:
Dataflow-Based Lenient Implementation of a Functional Language, Valid, on Conventional Multi-processors. IFIP PACT 1994: 279-288 - [c2]Shigeru Kusakabe, Eiichi Takahashi, Rin-Ichiro Taniguchi, Makoto Amamiya:
A Dataflow-Based Massively Parallel Programming Language and Its Implementation. PARLE 1994: 761-764 - [c1]Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi:
A Priority Forwarding Router Chip for Real-Time Interconnection Networks. RTSS 1994: 63-73
Coauthor Index
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