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ORCIDChung-Chieh Kuo
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- C.-C. Jay Kuo
![[0000-0001-9474-5035]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0001-9474-5035")
(aka: Chung-Chieh Jay Kuo) — University of Southern California, Department of Electrical Engineering, Los Angeles, CA, USA (and 3 more)
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2010 – 2019
- 2012
[j4]Chia-Chun Tsai, Chung-Chieh Kuo, Feng-Tzu Hsu, Trong-Yen Lee:
Discharge-path-based antenna effect detection and fixing for X-architecture clock tree. Integr. 45(1): 76-90 (2012)- 2011
- [j3]Chia-Chun Tsai, Chung-Chieh Kuo, Trong-Yen Lee:
Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 706-716 (2011) - [j2]Chung-Chieh Kuo, Chia-Chun Tsai, Trong-Yen Lee:
Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration. Integr. 44(1): 87-101 (2011) - 2010
- [c6]Chia-Chun Tsai, Chung-Chieh Kuo, Lin-Jeng Gu, Trong-Yen Lee:
Double-via insertion enhanced X-architecture clock routing for reliability. ISCAS 2010: 3413-3416 - [c5]Chia-Chun Tsai, Chung-Chieh Kuo, Lin-Jeng Gu, Trong-Yen Lee:
Antenna Violation Avoidance/Fixing for X-clock routing. ISQED 2010: 508-514
2000 – 2009
- 2008
- [c4]Chia-Chun Tsai, Wei-Shi Lin, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee:
Layer assignment considering manufacturability in X-architecture clock tree. CIT 2008: 880-885 - [c3]Chia-Chun Tsai, Chung-Chieh Kuo, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao:
X-clock routing based on pattern matching. SoCC 2008: 357-360 - 2007
- [j1]Jan-Ou Wu, Chia-Chun Tsai, Chung-Chieh Kuo, Trong-Yen Lee:
Zero-Skew Driven Buffered RLC Clock Tree Construction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(3): 651-658 (2007) - 2006
- [c2]Chia-Chun Tsai, Jan-Ou Wu, Yu-Ting Shieh, Chung-Chieh Kuo, Trong-Yen Lee:
Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction. APCCAS 2006: 812-815 - 2005
- [c1]Chia-Chun Tsai, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee, Wen-Ta Lee:
Zero-Skew Driven for RLC Clock Tree Construction in SoC. ICITA (1) 2005: 561-566
Coauthor Index
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