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Lu Wan
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2020 – today
- 2024
- [j8]Yuhuan Sun, Lu Wan, Sachin Kumar Mangla, Xiaofeng Xu, Malin Song:
Uncovering the Interactions Between the Enterprise AI Transformation, Supply Chain Concentration, and Corporate Risk-Taking Capacity. IEEE Trans. Engineering Management 71: 11315-11327 (2024) - 2023
- [j7]Lu Wan, Arun D. Khilnani, Xinglong Wu, Xiaokang Liu, Sergio Amedeo Pignari, David W. P. Thomas, Mark Sumner, Flavia Grassi:
Optimal Design of Single-Layer and Multi-Layer Air-Core Inductors Considering Uncertainty Factors. IEEE Access 11: 134460-134472 (2023) - [i2]Lu Wan, Xiaobing Dai, Torsten Welfonder, Ekaterina Petrova, Pieter Pauwels:
Semi-automated Thermal Envelope Model Setup for Adaptive Model Predictive Control with Event-triggered System Identification. CoRR abs/2307.00638 (2023) - 2020
- [j6]Lu Wan, Li Lin:
Kansei design method based on product narrative design element analysis. Int. J. Arts Technol. 12(4): 283-300 (2020)
2010 – 2019
- 2019
- [j5]Dana Bevilacqua, Ido Davidesco, Lu Wan, Kim Chaloner, Jess Rowland, Mingzhou Ding, David Poeppel, Suzanne Dikker:
Brain-to-Brain Synchrony and Learning Outcomes Vary by Student-Teacher Dynamics: Evidence from a Real-world Classroom Electroencephalography Study. J. Cogn. Neurosci. 31(3) (2019) - 2018
- [j4]Chen-Hsuan Lin, Lu Wan, Deming Chen:
C-Mine: Data Mining of Logic Common Cases for Improved Timing Error Resilience with Energy Efficiency. ACM Trans. Design Autom. Electr. Syst. 23(2): 20:1-20:23 (2018) - [i1]Jiliang Zhang, Lu Wan:
CMOS: Dynamic Multi-key Obfuscation Structure for Strong PUFs. CoRR abs/1806.02011 (2018) - 2014
- [c7]Chen-Hsuan Lin, Lu Wan, Deming Chen:
C-Mine: Data Mining of Logic Common Cases for Low Power Synthesis of Better-Than-Worst-Case Designs. DAC 2014: 205:1-205:6 - 2013
- [c6]Lu Wan, Bilal H. Fadlallah, Andreas Keil, José C. Príncipe:
Quantifying cognitive state from EEG using phase synchrony. EMBC 2013: 5809-5812 - 2012
- [b1]Lu Wan:
Analysis and optimization of digital circuit dynamic behavior. University of Illinois Urbana-Champaign, USA, 2012 - [j3]Lu Wan, Chen Dong, Deming Chen:
A Coarse-Grained Reconfigurable Architecture with Compilation for High Performance. Int. J. Reconfigurable Comput. 2012: 163542:1-163542:17 (2012) - [j2]Lu Wan, Deming Chen:
Analysis of Digital Circuit Dynamic Behavior With Timed Ternary Decision Diagrams for Better-Than-Worst-Case Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 662-675 (2012) - [c5]Lu Wan, Deming Chen:
CCP: common case promotion for improved timing error resilience with energy efficiency. ISLPED 2012: 135-140 - 2011
- [c4]Artem Rogachev, Lu Wan, Deming Chen:
Temperature aware statistical static timing analysis. ICCAD 2011: 103-110 - 2010
- [j1]Deming Chen, Jason Cong, Yiping Fan, Lu Wan:
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization. IEEE Trans. Very Large Scale Integr. Syst. 18(4): 564-577 (2010) - [c3]Lu Wan, Deming Chen:
Analysis of circuit dynamic behavior with timed ternary decision diagram. ICCAD 2010: 516-523
2000 – 2009
- 2009
- [c2]Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles:
Blueshift: Designing processors for timing speculation from the ground up. HPCA 2009: 213-224 - [c1]Lu Wan, Deming Chen:
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior. ICCAD 2009: 172-179
Coauthor Index
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