Provider: Schloss Dagstuhl - Leibniz Center for Informatics
Database: dblp computer science bibliography
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TY - CPAPER
ID - DBLP:conf/igarss/RostanUHO19
AU - Rostan, Friedhelm
AU - Ulrich, Dieter
AU - Heer, Christoph
AU - Østergaard, Allan
TI - The Metop-Sg Sca wind Scatterometer: Cdr Development Status and Performance Overview.
BT - 2019 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2019, Yokohama, Japan, July 28 - August 2, 2019
SP - 8332
EP - 8335
PY - 2019//
DO - 10.1109/IGARSS.2019.8898784
UR - https://doi.org/10.1109/IGARSS.2019.8898784
ER -
TY - CPAPER
ID - DBLP:conf/igarss/RostanUSHO18
AU - Rostan, Friedhelm
AU - Ulrich, Dieter
AU - Schied, Eberhard
AU - Heer, Christoph
AU - Østergaard, Allan
TI - In-Flight Calibration of the Metop-Sg Sca Wind Scatterometer.
BT - 2018 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2018, Valencia, Spain, July 22-27, 2018
SP - 2019
EP - 2022
PY - 2018//
DO - 10.1109/IGARSS.2018.8517990
UR - https://doi.org/10.1109/IGARSS.2018.8517990
ER -
TY - CPAPER
ID - DBLP:conf/igarss/FugenSHRWCH18
AU - Fügen, Thomas
AU - Sperlich, Eckhardt
AU - Heer, Christoph
AU - Riegger, Sebastian
AU - Warren, Carl
AU - Carbone, Adriano
AU - Hélière, Florence
TI - The Biomass SAR Instrument: Development Status and Performance Overview.
BT - 2018 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2018, Valencia, Spain, July 22-27, 2018
SP - 8571
EP - 8574
PY - 2018//
DO - 10.1109/IGARSS.2018.8518041
UR - https://doi.org/10.1109/IGARSS.2018.8518041
ER -
TY - CPAPER
ID - DBLP:conf/igarss/AdamiukFFGRH16
AU - Adamiuk, Grzegorz
AU - Fügen, Thomas
AU - Fischer, Christian
AU - Grafmueller, Bernhard
AU - Rostan, Friedhelm
AU - Heer, Christoph
TI - Verification of scan-on-receive beamforming for X-Band HRWS applications.
BT - 2016 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2016, Beijing, China, July 10-15, 2016
SP - 2120
EP - 2122
PY - 2016//
DO - 10.1109/IGARSS.2016.7729547
UR - https://doi.org/10.1109/IGARSS.2016.7729547
ER -
TY - JOUR
ID - DBLP:journals/ijertcs/KrsticFGBKHSSB12
AU - Krstic, Milos
AU - Fan, Xin
AU - Grass, Eckhard
AU - Benini, Luca
AU - Kakoee, Mohammad Reza
AU - Heer, Christoph
AU - Sanders, Birgit
AU - Strano, Alessandro
AU - Bertozzi, Davide
TI - Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience.
JO - Int. J. Embed. Real Time Commun. Syst.
VL - 3
IS - 4
SP - 1
EP - 18
PY - 2012//
DO - 10.4018/JERTCS.2012100101
UR - https://doi.org/10.4018/jertcs.2012100101
ER -
TY - CPAPER
ID - DBLP:conf/date/FanKGSH12
AU - Fan, Xin
AU - Krstic, Milos
AU - Grass, Eckhard
AU - Sanders, Birgit
AU - Heer, Christoph
TI - Exploring pausible clocking based GALS design for 40-nm system integration.
BT - 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012
SP - 1118
EP - 1121
PY - 2012//
DO - 10.1109/DATE.2012.6176663
UR - https://doi.org/10.1109/DATE.2012.6176663
UR - https://doi.ieeecomputersociety.org/10.1109/DATE.2012.6176663
UR - http://dl.acm.org/citation.cfm?id=2492984
ER -
TY - CPAPER
ID - DBLP:conf/issoc/KrsticFGHSBKSB11
AU - Krstic, Milos
AU - Fan, Xin
AU - Grass, Eckhard
AU - Heer, Christoph
AU - Sanders, Birgit
AU - Benini, Luca
AU - Kakoee, Mohammad Reza
AU - Strano, Alessandro
AU - Bertozzi, Davide
TI - Moonrake chip - GALS demonstrator in 40 nm CMOS technology.
BT - 2011 International Symposium on System on Chip, SoC 2011, Tampere, Finland, October 31 - November 2, 2011
SP - 9
EP - 13
PY - 2011//
DO - 10.1109/ISSOC.2011.6089693
UR - https://doi.org/10.1109/ISSOC.2011.6089693
ER -
TY - CPAPER
ID - DBLP:conf/date/PiguetGHOS04
AU - Piguet, Christian
AU - Gautier, Jacques
AU - Heer, Christoph
AU - O'Connor, Ian
AU - Schlichtmann, Ulf
TI - Extremely Low-Power Logic.
BT - 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France
SP - 656
EP - 663
PY - 2004//
DO - 10.1109/DATE.2004.1268919
UR - https://doi.org/10.1109/DATE.2004.1268919
UR - https://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268919
UR - http://dl.acm.org/citation.cfm?id=969095
ER -
TY - CPAPER
ID - DBLP:conf/iscas/LayerPH04
AU - Layer, Christophe
AU - Pfleiderer, Hans-Jörg
AU - Heer, Christoph
TI - A scalable compact architecture for the computation of integer binary logarithms through linear approximation.
BT - Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004
SP - 421
EP - 424
PY - 2004//
ER -
TY - CHAP
ID - DBLP:books/sp/04/HeerS04
AU - Heer, Christoph
AU - Schlichtmann, Ulf
TI - Ultra-Low-Power Design: Device and Logic Design Approaches.
BT - Ultra Low-Power Electronics and Design
SP - 1
EP - 20
PY - 2004//
DO - 10.1007/1-4020-8076-X_1
UR - https://doi.org/10.1007/1-4020-8076-X_1
ER -
TY - CPAPER
ID - DBLP:conf/esscirc/AmiranteFLBBHS03
AU - Amirante, Ettore
AU - Fischer, Jürgen
AU - Lang, Markus
AU - Bargagli-Stoffi, Agnese
AU - Berthold, Jörg
AU - Heer, Christoph
AU - Schmitt-Landsiedel, Doris
TI - An ultra low-power adiabatic adder embedded in a standard 0.13μm CMOS environment.
BT - ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003
SP - 599
EP - 602
PY - 2003//
DO - 10.1109/ESSCIRC.2003.1257206
UR - https://doi.org/10.1109/ESSCIRC.2003.1257206
ER -
TY - CPAPER
ID - DBLP:conf/igarss/HeerSZR03
AU - Heer, Christoph
AU - Soualle, Francis
AU - Zahn, Rolf
AU - Reber, Rolf
TI - Investigations on a new high resolution wide swath SAR concept.
BT - 2003 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2003, Toulouse, France, July 21-15, 2003
SP - 521
EP - 523
PY - 2003//
DO - 10.1109/IGARSS.2003.1293829
UR - https://doi.org/10.1109/IGARSS.2003.1293829
ER -
TY - CPAPER
ID - DBLP:conf/patmos/SchoenauerBH03
AU - Schoenauer, Tim
AU - Berthold, Jörg
AU - Heer, Christoph
TI - Reduced Leverage of Dual Supply voltages in Ultra Deep Submicron Technologies.
BT - Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings
SP - 41
EP - 50
PY - 2003//
DO - 10.1007/978-3-540-39762-5_6
UR - https://doi.org/10.1007/978-3-540-39762-5_6
ER -
TY - JOUR
ID - DBLP:journals/vlsisp/BerekovicPSWMLHG02
AU - Berekovic, Mladen
AU - Pirsch, Peter
AU - Selinger, Thorsten
AU - Wels, Kai-Immo
AU - Miro, Carolina
AU - Lafage, Anne
AU - Heer, Christoph
AU - Ghigo, Giovanni
TI - Architecture of an Image Rendering Co-Processor for MPEG-4 Visual Compositing.
JO - J. VLSI Signal Process.
VL - 31
IS - 2
SP - 157
EP - 171
PY - 2002//
DO - 10.1023/A:1015345406334
UR - https://doi.org/10.1023/A:1015345406334
ER -
TY - CPAPER
ID - DBLP:conf/icecsys/HeerKS01
AU - Heer, Christoph
AU - Kirstädter, Andreas
AU - Sauer, Christian
TI - Self-routing crossbar switch with internal contention resolution.
BT - Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001
SP - 693
EP - 696
PY - 2001//
DO - 10.1109/ICECS.2001.957570
UR - https://doi.org/10.1109/ICECS.2001.957570
ER -
TY - CPAPER
ID - DBLP:conf/asap/BerekovicPSWMLHG00
AU - Berekovic, Mladen
AU - Pirsch, Peter
AU - Selinger, Thorsten
AU - Wels, Kai-Immo
AU - Miro, Carolina
AU - Lafage, Anne
AU - Heer, Christoph
AU - Ghigo, Giovanni
TI - Architecture of an Image Rendering Co-Processor for MPEG-4 Systems.
BT - 12th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2000), 10-12 July 2000, Boston, MA, USA
SP - 15
EP - 24
PY - 2000//
DO - 10.1109/ASAP.2000.862374
UR - https://doi.org/10.1109/ASAP.2000.862374
UR - https://doi.ieeecomputersociety.org/10.1109/ASAP.2000.862374
ER -
TY - CPAPER
ID - DBLP:conf/iscas/BerekovicPSWMLH00
AU - Berekovic, Mladen
AU - Pirsch, Peter
AU - Selinger, Thorsten
AU - Wels, Kai-Immo
AU - Miro, Carolina
AU - Lafage, Anne
AU - Heer, Christoph
AU - Ghigo, Giovanni
TI - Co-processor architecture for MPEG-4 main profile visual compositing.
BT - IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings
SP - 180
EP - 183
PY - 2000//
DO - 10.1109/ISCAS.2000.856288
UR - https://doi.org/10.1109/ISCAS.2000.856288
ER -
TY - CPAPER
ID - DBLP:conf/vcip/HeerMLBGSW00
AU - Heer, Christoph
AU - Miro, Carolina
AU - Lafage, Anne
AU - Berekovic, Mladen
AU - Ghigo, Giovanni
AU - Selinger, Thorsten
AU - Wels, Kai-Immo
TI - Coprocessor architecture for MPEG-4 video object rendering.
BT - Visual Communications and Image Processing 2000, Perth, Australia, June 20, 2000
SP - 1451
EP - 1458
PY - 2000//
ER -
TY - CPAPER
ID - DBLP:conf/icecsys/HeerMLBGSW99
AU - Heer, Christoph
AU - Miro, Carolina
AU - Lafage, Anne
AU - Berekovic, Mladen
AU - Ghigo, Giovanni
AU - Selinger, Thorsten
AU - Wels, Kai-Immo
TI - Design and architecture of the MPEG-4 video rendering co-processor 'TANGRAM'.
BT - 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999
SP - 1205
EP - 1210
PY - 1999//
DO - 10.1109/ICECS.1999.814386
UR - https://doi.org/10.1109/ICECS.1999.814386
ER -
TY - THES
ID - DBLP:phd/dnb/Heer95
AU - Heer, Christoph
TI - Entwurfsmethode für selbstgetaktete VLSI-Datenpfadarchitekturen.
SP - 1
EP - 128
PY - 1995//
PB - Shaker
UR - https://d-nb.info/944336965
SN - ISBN 978-3-8265-0708-3
ER -
