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ORCIDAnders Edman
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2000 – 2009
- 2005
[c5]Anders Edman, Christer Svensson, Behzad Mesgarzadeh:
Synchronous latency-insensitive design for multiple clock domain. SoCC 2005: 83-86- 2004
- [c4]Anders Edman, Christer Svensson:
Timing closure through a globally synchronous, timing partitioned design methodology. DAC 2004: 71-74 - [c3]Mikael Olausson, Anders Edman, Dake Liu:
Bit Memory Instructions for a General CPU. IWSOC 2004: 215-218 - 2001
- [j1]Anders Edman, Jacob Christensen, Anders Emrich, Christer Svensson:
A low-power 416-lag 1.5-b 0.5-TMAC correlator in 0.6-μm CMOS. IEEE J. Solid State Circuits 36(2): 258-265 (2001) - 2000
- [c2]Daniel Eckerbert, Henrik Eriksson, Per Larsson-Edefors, Anders Edman:
An interconnect-driven design of a DFT processor. ISCAS 2000: 569-572
1990 – 1999
- 1996
- [c1]Anders Åström, Michael Hall, Anders Edman:
A comparison of bit-serial and multi-bit processor elements in a real-time signal processing SIMD architecture. HiPC 1996: 245-250
Coauthor Index
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last updated on 2024-04-25 05:53 CEST by the dblp team
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