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Link to original content: https://dblp.dagstuhl.de/pid/13/1972.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/nips/RouhaniLZLFOVMY20 AU - Rouhani, Bita Darvish AU - Lo, Daniel AU - Zhao, Ritchie AU - Liu, Ming AU - Fowers, Jeremy AU - Ovtcharov, Kalin AU - Vinogradsky, Anna AU - Massengill, Sarah AU - Yang, Lita AU - Bittner, Ray AU - Forin, Alessandro AU - Zhu, Haishan AU - Na, Taesik AU - Patel, Prerak AU - Che, Shuai AU - Koppaka, Lok Chand AU - Song, Xia AU - Som, Subhojit AU - Das, Kaustav AU - Tiwary, Saurabh AU - Reinhardt, Steven K. AU - Lanka, Sitaram AU - Chung, Eric S. AU - Burger, Doug TI - Pushing the Limits of Narrow Precision Inferencing at Cloud Scale with Microsoft Floating Point. BT - Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, NeurIPS 2020, December 6-12, 2020, virtual. PY - 2020// UR - https://proceedings.neurips.cc/paper/2020/hash/747e32ab0fea7fbd2ad9ec03daa3f840-Abstract.html ER - TY - JOUR ID - DBLP:journals/cluster/BittnerRF14 AU - Bittner, Ray AU - Ruf, Erik AU - Forin, Alessandro TI - Direct GPU/FPGA communication Via PCI express. JO - Clust. Comput. VL - 17 IS - 2 SP - 339 EP - 348 PY - 2014// DO - 10.1007/S10586-013-0280-9 UR - https://doi.org/10.1007/s10586-013-0280-9 ER - TY - CPAPER ID - DBLP:conf/fpl/ObergEBF12 AU - Oberg, Jason AU - Eguro, Ken AU - Bittner, Ray AU - Forin, Alessandro TI - Random decision tree body part recognition using FPGAs. BT - 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012 SP - 330 EP - 337 PY - 2012// DO - 10.1109/FPL.2012.6339226 UR - https://doi.org/10.1109/FPL.2012.6339226 ER - TY - CPAPER ID - DBLP:conf/fpl/Bittner12 AU - Bittner, Ray TI - Speedy bus mastering PCI express. BT - 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012 SP - 523 EP - 526 PY - 2012// DO - 10.1109/FPL.2012.6339270 UR - https://doi.org/10.1109/FPL.2012.6339270 ER - TY - CPAPER ID - DBLP:conf/icppw/BittnerR12 AU - Bittner, Ray AU - Ruf, Erik TI - Direct GPU/FPGA Communication via PCI Express. BT - 41st International Conference on Parallel Processing Workshops, ICPPW 2012, Pittsburgh, PA, USA, September 10-13, 2012 SP - 135 EP - 139 PY - 2012// DO - 10.1109/ICPPW.2012.20 UR - https://doi.org/10.1109/ICPPW.2012.20 UR - https://doi.ieeecomputersociety.org/10.1109/ICPPW.2012.20 ER - TY - CPAPER ID - DBLP:conf/bsn/RofoueiSBBSDH11 AU - Rofouei, Mahsan AU - Sinclair, Mike AU - Bittner, Ray AU - Blank, Tom AU - Saw, Nick AU - DeJean, Gerald AU - Heffron, Jeff TI - A Non-invasive Wearable Neck-Cuff System for Real-Time Sleep Monitoring. BT - International Conference on Body Sensor Networks, BSN 2011, Dallas, Texas, USA, 23-25 May, 2011 SP - 156 EP - 161 PY - 2011// DO - 10.1109/BSN.2011.38 UR - https://doi.org/10.1109/BSN.2011.38 UR - https://doi.ieeecomputersociety.org/10.1109/BSN.2011.38 ER - TY - CPAPER ID - DBLP:conf/fpga/SunBE11 AU - Sun, Ji AU - Bittner, Ray AU - Eguro, Ken TI - FPGA side-channel receivers. BT - Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, FPGA 2011, Monterey, California, USA, February 27, March 1, 2011 SP - 267 EP - 276 PY - 2011// DO - 10.1145/1950413.1950462 UR - https://doi.org/10.1145/1950413.1950462 ER - TY - CPAPER ID - DBLP:conf/egh/WhittedKRB09 AU - Whitted, Turner AU - Kajiya, James T. AU - Ruf, Erik AU - Bittner, Ray TI - Embedded function composition. BT - Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2009, New Orleans, Louisiana, USA, August 1-3, 2009 SP - 47 EP - 50 PY - 2009// DO - 10.2312/EGGH/HPG09/047-050 UR - https://doi.org/10.2312/EGGH/HPG09/047-050 UR - https://doi.org/10.1145/1572769.1572777 ER - TY - CPAPER ID - DBLP:conf/ersa/Bittner09 AU - Bittner, Ray TI - The Speedy DDR2 Controller For FPGAs. BT - Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2009, July 13-16, 2009, Las Vegas Nevada, USA SP - 205 EP - 211 PY - 2009// ER - TY - CPAPER ID - DBLP:conf/fpga/Bittner09 AU - Bittner, Ray TI - Bus mastering PCI express in an FPGA. BT - Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009 SP - 273 EP - 276 PY - 2009// DO - 10.1145/1508128.1508176 UR - https://doi.org/10.1145/1508128.1508176 ER - TY - CPAPER ID - DBLP:conf/hci/BittnerS09 AU - Bittner, Ray AU - Sinclair, Mike TI - VersaPatch: A Low Cost 2.5D Capacitive Touch Sensor. BT - Human-Computer Interaction. Novel Interaction Methods and Techniques, 13th International Conference, HCI International 2009, San Diego, CA, USA, July 19-24, 2009, Proceedings, Part II SP - 407 EP - 416 PY - 2009// DO - 10.1007/978-3-642-02577-8_44 UR - https://doi.org/10.1007/978-3-642-02577-8_44 ER - TY - CPAPER ID - DBLP:conf/bsn/ZhongSB06 AU - Zhong, Lin AU - Sinclair, Mike AU - Bittner, Ray TI - A Phone-Centered Body Sensor Network Platform: Cost, Energy Efficiency & User Interface. BT - 2006 International Workshop on Wearable and Implantable Body Sensor Networks (BSN 2006), 3-5 April 2006, Cambridge, Massachusetts, USA SP - 179 EP - 182 PY - 2006// DO - 10.1109/BSN.2006.4 UR - https://doi.org/10.1109/BSN.2006.4 UR - https://doi.ieeecomputersociety.org/10.1109/BSN.2006.4 ER - TY - THES ID - DBLP:phd/basesearch/Bittner97 AU - Bittner, Ray TI - Wormhole Run-Time Reconfiguration: Conceptualization and VLSI Design of a High Performance Computing System. PY - 1997// UR - https://hdl.handle.net/10919/30499 UR - http://scholar.lib.vt.edu/theses/available/etd-38419290973280/ UR - https://www.base-search.net/Record/da9ce524322ef4ad351cf11b71c7de6985d5575e016ccc3b05a231ffa95534a6 ER - TY - CPAPER ID - DBLP:conf/fccm/BittnerA97 AU - Bittner, Ray AU - Athanas, Peter M. TI - Computing kernels implemented with a wormhole RTR CCM. BT - 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA SP - 98 EP - 105 PY - 1997// DO - 10.1109/FPGA.1997.624609 UR - https://doi.org/10.1109/FPGA.1997.624609 UR - https://doi.ieeecomputersociety.org/10.1109/FPGA.1997.624609 ER - TY - CPAPER ID - DBLP:conf/fpga/BittnerA97 AU - Bittner, Ray AU - Athanas, Peter M. TI - Wormhole Run-Time Reconfiguration. BT - Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, FPGA 1997, Monterey, CA, USA, February 9-11, 1997 SP - 79 EP - 85 PY - 1997// DO - 10.1145/258305.258315 UR - https://doi.org/10.1145/258305.258315 ER -