default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDChing-Yuan Yang
Person information
SPARQL queries 
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2023
[c36]Shu-Chi Wang, Ching-Yuan Yang:
Behavior Simulation of CDR for SSC System With a Compact Quarter-Rate Linear Phase Detector. ISOCC 2023: 79-80- [c35]Wan-Yu You, Ching-Yuan Yang:
Behavior Simulation of SSC Generator With Adjustable Modulation Frequency and Depth. ISOCC 2023: 81-82 - [c34]Ke-Chiao Chou, Chun-Hung Lin, Ching-Yuan Yang:
A 30-GHz Frequency Doubler Using a Current Folding Technique in 90-nm CMOS Technology. MOCAST 2023: 1-4 - 2022
- [c33]Tsung-Ying Chen, Ching-Yuan Yang, Dung-An Wang
:
A 80-MHz 91.2 ppm/°C Self-Biased Frequency-Locked-Loop Timer. ISOCC 2022: 292-293 - [c32]Shao-Yu Shu, Chun-Hung Lin, Ching-Yuan Yang:
A 5-GHz Sub-Sampling Phase-Locked Loop With Pulse-Width to Current Conversion. VLSI-DAT 2022: 1-4 - 2021
- [j20]Ching-Yuan Yang, Miao-Shan Li, Ai-Jia Chuang:
A Wide-Range Folded-Tuned Dual-DLL-Based Clock-Deskewing Circuit for Core-to-Core Links. IEEE Trans. Very Large Scale Integr. Syst. 29(5): 883-894 (2021) - [c31]Yen-Kuei Lu, Miao-Shan Li, Ching-Yuan Yang, Chin-Lung Lin:
A 2.7-Gb/s Multiplexed-DLL-Based CDR Circuit for ±10% Clock-Embedded Spread-Spectrum Modulation Depth. A-SSCC 2021: 1-3 - [c30]Yong-Zheng Wang, Ching-Yuan Yang:
A Self Synchronized-Switch Rectifier for Piezoelectric-Vibration Energy-Harvesting Systems. ISOCC 2021: 61-62 - 2020
- [c29]Wan-Ling Wu, Ching-Yuan Yang, Dung-An Wang:
A Flipping Active-Diode Rectifier for Piezoelectric-Vibration Energy-Harvesting. ECCTD 2020: 1-4 - [c28]Hao-Hsiang Hsu, Ching-Yuan Yang, Dung-An Wang:
A High-Efficiency Parallel-SSHI Rectifier for Piezoelectric Energy Harvesting. ISOCC 2020: 222-223
2010 – 2019
- 2019
- [c27]Chih-Yang Lin, Cheng-Hsun Chen, Ching-Yuan Yang, Fityanul Akhyar, Chao-Yung Hsu, Hui-Fuang Ng:
Cascading Convolutional Neural Network for Steel Surface Defect Detection. AHFE (14) 2019: 202-212 - [c26]Wan-Ling Wu, Yong-Zheng Wang, Ching-Yuan Yang:
Flipping Rectifiers for Piezoelectric Vibration Energy Harvesting. ISOCC 2019: 198-199 - [c25]Miao-Shan Li, Yen-Kuei Lu, Ching-Yuan Yang, Chin-Lung Lin:
PLL-Based Clock and Data Recovery for SSC Embedded Clock Systems. ISOCC 2019: 309-310 - [c24]Po-Yu Hsieh, Shao-Yu Shu, Ching-Yuan Yang:
A Spur-Suppression Technique for Frequency Synthesizer with Pulse-Width to Current Conversion. ISPACS 2019: 1-2 - [c23]Guan-Min Luo, Ching-Yuan Yang:
A 10-GHz Fast-Locked All-Digital Frequency Synthesizer with Frequency-Error Detection. SoCC 2019: 92-96 - [c22]You-Sheng Lin, Miao-Shan Li, Ching-Yuan Yang:
A 2.7-Gb/s Clock and Data Recovery Circuit Based on D/PLL. SoCC 2019: 284-288 - 2017
- [c21]Chia-Chi Liu, Ching-Yuan Yang:
A 1.5-Gb/s adaptive equalizer with periodically embedded clock encoding for intra-panel interfaces. ISOCC 2017: 248-249 - [c20]Yen-Chen Lin, Ching-Yuan Yang, James Chang:
A 1.5-Gb/s equalizer with adaptive swing controller for TFT-LCD driver. ISOCC 2017: 250-251 - [c19]Ching-Yuan Yang:
W2A: Analog-to-digital converters and low-noise amplifiers. SoCC 2017: 1 - [c18]Ching-Yuan Yang, Jen-Yan Huang, Jun-Hong Weng:
Realization of buck converter with adaptive variable-frequency control. SoCC 2017: 211-214 - 2016
- [j19]Hsuan-Yu Chang, Ching-Yuan Yang:
A Reference Voltage Interpolation-Based Calibration Method for Flash ADCs. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1728-1738 (2016) - [c17]Po-Tsang Chen, Ching-Yuan Yang:
A 90-nm CMOS Frequency Synthesizer with a Tripler for 60-GHz Wireless Communication Systems. ISVLSI 2016: 479-483 - 2015
- [j18]Jung-Mao Lin, Ching-Yuan Yang:
A Fast-Locking All-Digital Phase-Locked Loop With Dynamic Loop Bandwidth Adjustment. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(10): 2411-2422 (2015) - [j17]Jung-Mao Lin, Ching-Yuan Yang, Hsin-Ming Wu:
A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4× Oversampling. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 791-795 (2015) - 2014
- [c16]Hsuan-Yu Chang, Ching-Yuan Yang:
A high-speed low-power calibrated flash ADC. ISCAS 2014: 2369-2372 - 2013
- [c15]Chih-Hsiang Chang, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng, Nai-Chen Cheng:
A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS. ESSCIRC 2013: 53-56 - 2012
- [c14]Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang:
A chip-to-chip clock-deskewing circuit for 3-D ICs. ISCAS 2012: 1652-1655 - [c13]Ching-Yuan Yang, Jia-Jiun Lin, Chih-Hsiang Chang:
A 22-GHz low-power frequency synthesizer in 0.18-um CMOS. ISCIT 2012: 118-121 - 2011
- [j16]Ching-Yuan Yang, Jun-Hong Weng, Hsuan-Yu Chang:
A 5-GHz Direct Digital Frequency Synthesizer Using an Analog-Sine-Mapping Technique in 0.35- μ m SiGe BiCMOS. IEEE J. Solid State Circuits 46(9): 2064-2072 (2011) - [j15]Ching-Yuan Yang, Chih-Hsiang Chang, Jun-Hong Weng, Hsin-Ming Wu:
A 0.5/0.8-V 9-GHz Frequency Synthesizer With Doubling Generation in 0.13-μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 58-II(2): 65-69 (2011) - [c12]Jun-Hong Weng, Ching-Yuan Yang, Yi-Lin Jhu:
A low-power direct digital frequency synthesizer using an analogue-sine-conversion technique. ISLPED 2011: 193-198 - 2010
- [c11]Yu Lee, Ching-Yuan Yang, Nai-Chen Daniel Cheng, Ji-Jan Chen:
An embedded wide-range and high-resolution CLOCK jitter measurement circuit. DATE 2010: 1637-1640
2000 – 2009
- 2009
- [j14]Ching-Yuan Yang, Chih-Hsiang Chang, Wen-Ger Wong:
A Delta-Sigma PLL-Based Spread-Spectrum Clock Generator With a Ditherless Fractional Topology. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(1): 51-59 (2009) - 2008
- [j13]Ching-Yuan Yang, Ken-Hao Chang:
Injection-Locked Clock Recovery Using a Multiplexed Oscillator for Half-Rate Data-Recovered Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(1): 409-412 (2008) - [j12]Ching-Yuan Yang, Chih-Hsiang Chang, Wen-Ger Wong:
A 3.2-GHz Down-Spread Spectrum Clock Generator Using a Nested Fractional Topology. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(2): 497-503 (2008) - [j11]Chin-Sien Moo, Chun-Kai Huang, Ching-Yuan Yang:
Acoustic-Resonance-Free High-Frequency Electronic Ballast for Metal Halide Lamps. IEEE Trans. Ind. Electron. 55(10): 3653-3660 (2008) - [j10]Ching-Yuan Yang, Yu Lee:
A PWM and PAM Signaling Hybrid Technology for Serial-Link Transceivers. IEEE Trans. Instrum. Meas. 57(5): 1058-1070 (2008) - [c10]Kai Pong Wu, Ching-Yuan Yang, Jung-Mao Lin:
A 2.5Gb/s oversampling clock and data recovery circuit with frequency calibration technique. APCCAS 2008: 1356-1359 - [c9]Gung-Yu Lin, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng:
A programmable duty cycle corrector based on delta-sigma modulated PWM mechanism. APCCAS 2008: 1406-1409 - 2007
- [j9]Ching-Yuan Yang, Jung-Mao Lin:
A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation. IEICE Trans. Electron. 90-C(1): 196-200 (2007) - [c8]Meng-Ting Tsai, Ching-Yuan Yang:
A Fast-Locking Agile Frequency Synthesizer for MIMO Dual-mode WiFi / WiMAX Applications. ICECS 2007: 1384-1387 - 2006
- [j8]Ching-Yuan Yang, Yu Lee, Cheng-Hsing Lee:
A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector. IEICE Trans. Electron. 89-C(6): 746-752 (2006) - [j7]Ching-Yuan Yang, Meng-Ting Tsai:
High-Frequency Low-Noise Voltage-Controlled LC-Tank Oscillators Using a Tunable Inductor Technique. IEICE Trans. Electron. 89-C(11): 1567-1574 (2006) - [c7]Hsin-Ming Wu, Ching-Yuan Yang:
A 3.125-GHz Limiting Amplifier for Optical Receiver System. APCCAS 2006: 210-213 - [c6]Chia-Chieh Tu, Ching-Yuan Yang:
A 6.5-GHz LC VCO with Integrated-Transformer Tuning. APCCAS 2006: 510-513 - [c5]Meng-Ting Tsai, Ching-Yuan Yang:
A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels. ISCAS 2006 - [c4]Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang:
A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. ISCAS 2006 - [c3]Jun-Hong Weng, Chong-Jng Yu, Ching-Yuan Yang, Peng-Chang Yang:
A low-noise microsensor amplifier with automatic gain control system. ISCAS 2006 - 2005
- [c2]Ching-Yuan Yang, Yu Lee:
A 0.18-µm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques. ISCAS (2) 2005: 1150-1153 - [c1]Ching-Yuan Yang, Jen-Wen Chen, Meng-Ting Tsai:
A high-frequency phase-compensation fractional-N frequency synthesizer. ISCAS (5) 2005: 5091-5094 - 2002
- [j6]Hsiang-Hui Chang, Jyh-Woei Lin, Ching-Yuan Yang, Shen-Iuan Liu:
A wide-range delay-locked loop with a fixed latency of one clock cycle. IEEE J. Solid State Circuits 37(8): 1021-1027 (2002) - 2001
- [j5]Ching-Yuan Yang, Shen-Iuan Liu:
A one-wire approach for skew-compensating clock distribution based on bidirectional techniques. IEEE J. Solid State Circuits 36(2): 266-272 (2001) - 2000
- [j4]Guang-Kaai Dehng, June-Ming Hsu, Ching-Yuan Yang, Shen-Iuan Liu:
Clock-deskew buffer using a SAR-controlled delay-locked loop. IEEE J. Solid State Circuits 35(8): 1128-1136 (2000) - [j3]Guang-Kaai Dehng, Ching-Yuan Yang, June-Ming Hsu, Shen-Iuan Liu:
A 900-MHz 1-V CMOS frequency synthesizer. IEEE J. Solid State Circuits 35(8): 1211-1214 (2000) - [j2]Ching-Yuan Yang, Shen-Iuan Liu:
Fast-switching frequency synthesizer with a discriminator-aided phase detector. IEEE J. Solid State Circuits 35(10): 1445-1452 (2000)
1990 – 1999
- 1998
- [j1]Ching-Yuan Yang, Guang-Kaai Dehng, June-Ming Hsu, Shen-Iuan Liu:
New dynamic flip-flops for high-speed dual-modulus prescaler. IEEE J. Solid State Circuits 33(10): 1568-1571 (1998)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:43 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
