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ORCIDJournal of Low Power Electronics, Volume 13
Volume 13, Number 1, March 2017
- Juan P. Oliver, Francisco Veirano, Diego A. Bouvier, Eduardo I. Boemo
:
A Low Cost System for Self Measurements of Power Consumption in Field Programmable Gate Arrays. 1-9 - Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier:
A Cross-Level Power Estimation Technique to Enhance High-Level Power Models Quality. 10-28 - Zahra Rouhani, Shaahin Angizi, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh:
Towards Approximate Computing with Quantum-Dot Cellular Automata. 29-35 - Reza Faghih Mirzaee, Niloofar Farahani:
Design of a Ternary Edge-Sensitive D FFF for Multiple-Valued Sequential Logic. 36-46 - Pooran Singh, Bhupendra Singh Reniwal, Vikas Vijayvargiya, V. Sharma, Santosh Kumar Vishvakarma:
Dynamic Feedback Controlled Static Random Access Memory for Low Power Applications. 47-59 - Young Eun Song, Hyeon Jun Cho, Hyerin Park, Byong-Hun Jeon, Jung Rae Kim:
Customized Power Management System Using a Capacitor Array and DC/DC Booster for Flat-Plate Microbial Fuel Cells. 60-66 - P. Karuppanan, Soumya Ranjan Ghosh, Kamran Khan, Pavan Kumar Bikki:
A Fully Differential Operational Amplifier with Slew Rate Enhancer and Adaptive Bias for Ultra Low Power. 67-75 - Ball Mukund Mani Tripathi, Prateek Jain, Shayma Prasad Das:
SiGe Source Dual Metal Double Gate Tunnel Field Effect Transistor. 76-82 - Mohamayee Mohapatra, Anup Kumar Panda, B. P. Panigrahi, Prativa Priyadarshini Sahoo, B. Chitti Babu:
A Comparative Analysis of Single Switch Soft-Switching Boost Converter and Interleaved Soft-Switching Boost Converter. 83-93 - João Luiz Dallamuta Lopes, Lúcio dos Reis Barbosa:
Soft-Switched High Step-Up Converter for Low Voltage Sustainable Energy Systems. 94-104 - Hicham Akhamal, Mostafa Chakir, Hatim Ameziane, Hassan Qjidaa:
A 20 ppm/°C Temperature Coefficient and High Power Supply Rejection Ratio Bandgap Reference Implemented in 90 nm CMOS Technology for Low Drop-Out Voltage Regulator Applications. 105-113 - Rabia Melati, Azzedine Hamid, Adda Benattia Tekkouk:
Thermal Modeling of a Spiral Planar Inductor. 114-121 - Steffen Paul, Gilles Jacquemod:
Selected Articles from the 7th International Workshop on CMOS Variability Bremen, Germany, September 21-23, 2016. 122-123 - Peyman Pouyan, Esteve Amat, Said Hamdioui, Antonio Rubio:
Resistive Random Access Memory Variability and Its Mitigation Schemes. 124-134 - Timur Schafer, Theodor Hillebrand, Nico Hellwege, Marco Erstling, Dagmar Peters-Drolshagen, Steffen Paul:
Design and Verification of Analog CMOS Circuits Using the g m/I D-Method with Age-Dependent Degradation Effects. 135-147
Volume 13, Number 2, June 2017
- Ahsan Saghir, Ehsan Atoofian, Ali Manzak:
Reducing Power of Memory Hierarchy in General Purpose Graphics Processing Units. 149-165 - Arghavan Asad, Mahmood Fathy, Mohammad Reza Jahed-Motlagh, Kaamran Raahemifar:
Power Modeling and Runtime Performance Optimization of Power Limited Many-Core Systems Based on a Dynamic Adaptive Approach. 166-195 - Ali Ibrahim, Maurizio Valle:
Approximate Computing Techniques for Low Power Implementation of Reconfigurable Coordinate Rotation Digital Computer Circuits. 196-204 - Ge Chen, Saeid Nooshabadi:
Low Energy Bus Design with Error Tolerant Coding. 205-219 - Antonios N. Dadaliaris, Panagiotis Oikonomou, Maria G. Koziri, Evangelia Nerantzaki, Yannis Hatzaras, Dimitrios Garyfallou, Thanasis Loukopoulos, Georgios I. Stamoulis:
Heuristics to Augment the Performance of Tetris Legalization: Making a Fast but Inferior Method Competitive. 220-230 - Pritam Bhattacharjee, Kunal Das, Arijit Dey, Debashis De, Swarnendu Kumar Chakraborty:
Estimation of Power Dissipation in Ternary Quantum Dot Cellular Automata Cell. 231-239 - Seied Zaniar Hoseini, Kye-Shin Lee, Hae Chung, Young-Joon Song:
2-Channel Electroencephalography Sensor Frontend for Portable Health Condition Monitoring Applications. 240-248 - Reza Chavoshisani, Omid Hashemipour:
Low Power Current Conveyor Based Continuous Time Sigma Delta Modulator. 249-254 - Luigi Colalongo, Anna Richelli, Pierluigi Cabinio, Zsolt Miklós Kovács-Vajna:
A Bidirectional Differential Cascode Voltage Switch DC-DC Buck-Boost Converter for Low Voltage Application. 255-262 - Karim El Khadiri, Hicham Akhmal, Hassan Qjidaa:
Li-Ion Battery Charging with a Buck-Boost DC-DC Converter for a Portable Device Power Management. 263-270 - Hyusim Park, Niranjan D. Karandikar, Sungyong Jung, Kwangki Ryoo:
Variable Gain Potentiostat Architecture for Glucose Sensing from Blood and Tear Fluid. 271-278
Volume 13, Number 3, September 2017
- Patrick Girard:
A Special Section on New and Future Trends in Low Power Electronics. 279 - Jia Di, Brent A. Bell, William Bouillon, John Brady, Thao Le, Chien-Wei Lo, Liang Men, Spencer Nelson, Francis Sabado, Andrew Suchanek:
Recent Advances in Low Power Asynchronous Circuit Design. 280-297 - Marc Belleville, Anca Molnos, Gilles Sicard, Jean-Frédéric Christmann, Dominique Morche, Duy-Hieu Bui, Diego Puschini, Suzanne Lesecq, Edith Beigné:
Adaptive Architectures, Circuits and Technology Solutions for Future IoT Systems. 298-309 - Amit Kumar Singh, Charles Leech, Basireddy Karunakar Reddy, Bashir M. Al-Hashimi, Geoff V. Merrett:
Learning-Based Run-Time Power and Energy Management of Multi/Many-Core Systems: Current and Future Trends. 310-325 - Antonio J. Acosta, Erica Tena-Sánchez, Carlos Jesús Jiménez-Fernández, Javier M. Mora-Merchan:
Power and Energy Issues on Lightweight Cryptography. 326-337 - Xinfei Guo, Vaibhav Verma, Patricia Gonzalez-Guerrero, Sergiu Mosanu, Mircea R. Stan:
Back to the Future: Digital Circuit Design in the FinFET Era. 338-355 - Alberto García Ortiz, Lennart Bamberg, Amir Najafi:
Low-Power Coding: Trends and New Challenges. 356-370 - Alberto Bocca, Alberto Macii, Massimo Poncino:
A Modular Framework for Battery Modeling in Electronic Designs. 371-381 - Kai Yang, Robert Karam, Swarup Bhunia:
Energy-Efficient Reconfigurable Hardware Accelerators for Data-Intensive Applications. 382-394 - Alexander E. Shapiro, Eby G. Friedman:
Interconnect Delay Model for Wide Supply Voltage Range Repeater Insertion in Sub-22 nm FinFET Technologies. 395-401 - Andre L. M. Martins, Marcelo Ruaro, Anderson C. Sant'Ana, Fernando Gehm Moraes:
Distributed Runtime Energy Management for Many-Core Systems Running Real-Time Applications. 402-418 - Asmita Pal, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy:
Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit. 419-427 - Giuseppe Visalli:
Low-Energy and Secure Aggregation of Uncorrelated Data in Clustered Sensor Network. 428-440 - Erwan Moreac, Pierre Bomel, Johann Laurent, André Rossi:
Energy Savings in Networks-on-Chip with Smart Temporal Shielding. 441-455 - Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya, S. Saqib Khursheed:
Improved Wire Length-Driven Placement Technique for Minimizing Wire Length, Area and Timing. 456-471 - Manash Chanda, Tanushree Ganguli, Sandipta Mal, Anindita Podder, Chandan Kumar Sarkar:
Energy Efficient Adiabatic Logic Styles in Sub-Threshold Region for Ultra Low Power Application. 472-481 - Sankit R. Kassa, Rajendra Kumar Nagaria:
A Novel Design for 4-Bit Code Converters in Quantum Dot Cellular Automata. 482-489 - Vinay Kumar, Krishna Lal Baishnab, Binod Kumar:
A Novel Shared Active Pixel Architecture (SAPA) with Low Dark Current and High Fill-Factor (FF) for CMOS Image Sensors. 490-496 - Jie Lin, Jiann-Shiun Yuan:
A 12-Bit Ultra-Low Voltage Noise Shaping Successive-Approximation Register Analogto-Digital Converter Using Emerging TFETs. 497-510 - Alak Majumder, Abir J. Mondal, Bidyut K. Bhattacharyya:
A 65 nm Design of 0.6 V/8.98 μW Process-Voltage-Aware Dynamic Analog Comparator for High Speed Data Reconstruction Applications. 511-519 - Tripurari Sharan, Vijaya Bhadauria:
Fully Differential Operational Transconductance Amplifier with Enhanced Phase Margin and Gain for Ultra-Low-Power Circuits. 520-535 - B. Vandana, S. K. Mohapatra, Jitendra Kumar Das, B. S. Patro:
Prospects of 2D Junctionless Channel Transistor (JLCT) Towards Analog and RF Metrics Using Si and SiGe in Device Layer. 536-544
Volume 13, Number 4, December 2017
- Michal Lid'ák, Dominik Macko:
A New Automated Power-Estimation Method for SystemC Hardware Design. 545-550 - Kapil Dev, Xin Zhan, Sherief Reda:
Scheduling on CPU + GPU Processors Under Dynamic Conditions. 551-568 - R. K. Kavitha, Vineeth Johns Toms, Vipin Vinayakan, B. Venkataramani:
Low Power Data Driven Conditional Precharge Dynamic Flip Flop. 569-575 - Alak Majumder:
Gated Clock Tree Circuit to Reduce the Noise in Silicon Chip. 576-579 - José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi:
1.2 V Single Supply CMOS Level-Up Shifter for Low Energy Systems. 580-587 - Jamel Nebhen, Stéphane Meillére, Mohamed Masmoudi:
A High Linear and Temperature Compensation Ring Voltage-Controlled Oscillator for Random Number Generator. 588-594 - Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard:
A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps. 595-604 - Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan:
Selected Articles from the IEEE ISED 2016 Conference. 605-606 - Djamila Dekkiche, Bastien Vincke, Alain Mérigot:
Targeting System-Level and Kernel-Level Optimizations of Computer Vision Applications on Embedded Systems. 607-615 - Vrinda Kochar, Arnab Sarkar:
Real-Time Scheduling on Dynamic Resources in a Fog Computing Environment. 616-626 - Ammar A. Altameemi, Neil W. Bergmann:
Field Programmable Gate Array Softcore Processors Optimised for Digital Signal Processing Applications. 627-632 - Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs. 633-641 - Shibaji Banerjee, Jimson Mathew:
An Optimal Leakage-Aware Approach for Nano-CMOS Post-Physical-Optimization. 642-648 - Adedotun Adeyemo, Abusaleh M. Jabir, Jimson Mathew:
Minimising Impact of Wire Resistance in Low-Power Crossbar Array Write Scheme. 649-660 - Rijo Sebastian, Jos A. V. Prakash, Babita Roslind Jose, Shahana Thottathikkulam Kassim:
Multi-Stage Noise Shaping ΔΣ Modulator with Enhanced Noise Shaping for Low Power Wideband Applications. 661-668 - B. Jhnanesh Somayaji, M. S. Bhat:
Triple Reduced Surface Field Drain Extended MOS Device Design and Its RF Performance Evaluation for Sub-Micron RF SoC Platform. 669-677 - Arvind Gautam, Anuradha Balouria, Divya Andem, Kare Mounika, A. Bhargavi Rani, Amit Acharyya, Swati Ghosh Acharyya:
Thermo-Magnetic Control System for Nano-Ferromagnetic Particle Doped Shape Memory Alloy for Orthopedic Devices and Rehabilitation Techniques. 678-686
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