{"id":"https://openalex.org/W2078211411","doi":"https://doi.org/10.1109/tvlsi.2010.2100052","title":"A Low-Power Single-Phase Clock Multiband Flexible Divider","display_name":"A Low-Power Single-Phase Clock Multiband Flexible Divider","publication_year":2011,"publication_date":"2011-01-13","ids":{"openalex":"https://openalex.org/W2078211411","doi":"https://doi.org/10.1109/tvlsi.2010.2100052","mag":"2078211411"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2010.2100052","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056378411","display_name":"Vamshi Manthena","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"V. K. Manthena","raw_affiliation_strings":["Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078422466","display_name":"Manh Anh","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Manh Anh Do","raw_affiliation_strings":["Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033403894","display_name":"Chirn Chye Boon","orcid":"https://orcid.org/0000-0003-0298-6232"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chirn Chye Boon","raw_affiliation_strings":["Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009974389","display_name":"Kiat Seng Yeo","orcid":"https://orcid.org/0000-0002-4524-707X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kiat Seng Yeo","raw_affiliation_strings":["Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.582,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":47,"citation_normalized_percentile":{"value":0.95203,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":95},"biblio":{"volume":"20","issue":"2","first_page":"376","last_page":"380"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Phase-Locked Loops in High-Speed Circuits","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Phase-Locked Loops in High-Speed Circuits","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility in Electronics","score":0.9984,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/wilkinson-power-divider","display_name":"Wilkinson power divider","score":0.5556142},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency Synthesizer","score":0.516829},{"id":"https://openalex.org/keywords/phase-locked-loops","display_name":"Phase-Locked Loops","score":0.504482},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-Digital Converter","score":0.50301},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.4735633},{"id":"https://openalex.org/keywords/current-divider","display_name":"Current divider","score":0.41201138}],"concepts":[{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.8241394},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5996177},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.57619643},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.5633749},{"id":"https://openalex.org/C184028887","wikidata":"https://www.wikidata.org/wiki/Q265565","display_name":"Wilkinson power divider","level":4,"score":0.5556142},{"id":"https://openalex.org/C202988678","wikidata":"https://www.wikidata.org/wiki/Q1417986","display_name":"Power dividers and directional couplers","level":2,"score":0.53290683},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47794417},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.4735633},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.47199583},{"id":"https://openalex.org/C97264828","wikidata":"https://www.wikidata.org/wiki/Q4157078","display_name":"Current divider","level":4,"score":0.41201138},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.36301088},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.35639134},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.27938056}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2010.2100052","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.84,"id":"https://metadata.un.org/sdg/7"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":17,"referenced_works":["https://openalex.org/W1595570256","https://openalex.org/W1977248117","https://openalex.org/W1993358776","https://openalex.org/W2000068870","https://openalex.org/W2001346902","https://openalex.org/W2074262852","https://openalex.org/W2107437643","https://openalex.org/W2111105786","https://openalex.org/W2137782631","https://openalex.org/W2138134203","https://openalex.org/W2144538799","https://openalex.org/W2146626643","https://openalex.org/W2147843481","https://openalex.org/W2150306869","https://openalex.org/W2157024459","https://openalex.org/W3103339143","https://openalex.org/W4230728857"],"related_works":["https://openalex.org/W2610426967","https://openalex.org/W2543131666","https://openalex.org/W2521771618","https://openalex.org/W2376871170","https://openalex.org/W2201499394","https://openalex.org/W2200597858","https://openalex.org/W2091409409","https://openalex.org/W1996188855","https://openalex.org/W1975478216","https://openalex.org/W1528236714"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,32,41,73],"low-power":[4],"single-phase":[5],"clock":[6],"multiband":[7,37,83],"flexible":[8,84],"divider":[9,38,85],"for":[10,51],"Bluetooth,":[11],"Zigbee,":[12],"and":[13,16,28,47,55,69,89,94,99],"IEEE":[14],"802.15.4":[15],"802.11":[17],"a/b/g":[18],"WLAN":[19],"frequency":[20],"synthesizers":[21],"is":[22,29,86],"proposed":[23,42,82],"based":[24],"on":[25],"pulse-swallow":[26],"topology":[27],"implemented":[30],"using":[31],"0.18-\u03bcm":[33],"CMOS":[34],"technology.":[35],"The":[36,81],"consists":[39],"of":[40,64,92],"wideband":[43],"multimodulus":[44],"32/33/47/48":[45],"prescaler":[46],"an":[48],"improved":[49],"bit-cell":[50],"swallow":[52],"(S)":[53],"counter":[54],"can":[56],"divide":[57],"the":[58,61],"frequencies":[59],"in":[60,97],"three":[62],"bands":[63],"2.4-2.484":[65],"GHz,":[66,68],"5.15-5.35":[67],"5.725-5.825":[70],"GHz":[71],"with":[72],"resolution":[74],"selectable":[75],"from":[76],"1":[77],"to":[78],"25":[79],"MHz.":[80],"silicon":[87],"verified":[88],"consumes":[90],"power":[91,107],"0.96":[93],"2.2":[95],"mW":[96],"2.4-":[98],"5-GHz":[100],"bands,":[101],"respectively,":[102],"when":[103],"operated":[104],"at":[105],"1.8-V":[106],"supply.":[108]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2078211411","counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":9},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":11},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2024-11-17T17:09:34.089195","created_date":"2016-06-24"}