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{"id":"https://openalex.org/W2768520177","doi":"https://doi.org/10.1109/patmos.2017.8106978","title":"Prototyping memristors in digital system with an FPGA-based testing environment","display_name":"Prototyping memristors in digital system with an FPGA-based testing environment","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2768520177","doi":"https://doi.org/10.1109/patmos.2017.8106978","mag":"2768520177"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2017.8106978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065616008","display_name":"Daniel Wust","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Daniel Wust","raw_affiliation_strings":["Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080802150","display_name":"Mehrdad Biglari","orcid":"https://orcid.org/0000-0001-7384-4261"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehrdad Biglari","raw_affiliation_strings":["Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088033577","display_name":"Johannes Kncodtel","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Johannes Kncodtel","raw_affiliation_strings":["Friedrich-Alexander-Universitat Erlangen-Nurnberg, Erlangen, Bayern, DE"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universitat Erlangen-Nurnberg, Erlangen, Bayern, DE","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014794132","display_name":"Marc Reichenbach","orcid":"https://orcid.org/0000-0002-9687-6247"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marc Reichenbach","raw_affiliation_strings":["Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054846003","display_name":"Christopher S\u00f6ll","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christopher Soll","raw_affiliation_strings":["Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Institute for Electronics Engineering, Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Institute for Electronics Engineering, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030918623","display_name":"Dietmar Fey","orcid":"https://orcid.org/0000-0002-6077-4732"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Dietmar Fey","raw_affiliation_strings":["Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Chair Computer Architecture, Germany","institution_ids":["https://openalex.org/I181369854"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.611,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":3,"citation_normalized_percentile":{"value":0.573568,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":75,"max":77},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9973,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9973,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.85821325},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.65711135}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.85821325},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.75519013},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6696748},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.65711135},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.58432674},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.5235747},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49817133},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4663799},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46314287},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24603468},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.23278654},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.19368133},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09612352},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2017.8106978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.43,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":16,"referenced_works":["https://openalex.org/W1973623217","https://openalex.org/W1977756332","https://openalex.org/W1990887049","https://openalex.org/W2026377239","https://openalex.org/W2027670468","https://openalex.org/W2050422009","https://openalex.org/W2102255233","https://openalex.org/W2162651880","https://openalex.org/W2171888576","https://openalex.org/W2487018225","https://openalex.org/W2521820665","https://openalex.org/W2533469876","https://openalex.org/W2575003601","https://openalex.org/W2595748027","https://openalex.org/W2610654006","https://openalex.org/W4253845620"],"related_works":["https://openalex.org/W4401034269","https://openalex.org/W4229452466","https://openalex.org/W3031124155","https://openalex.org/W2966276069","https://openalex.org/W2463286374","https://openalex.org/W2386041993","https://openalex.org/W2358307108","https://openalex.org/W2304829496","https://openalex.org/W1967938402","https://openalex.org/W1608572506"],"abstract_inverted_index":{"Toward":[0],"integrating":[1,119],"memristors":[2,43,120,141],"in":[3,13,97,104,121],"CMOS-based":[4,124],"designs":[5],"flexible":[6,36],"prototyping":[7,102],"environments":[8],"are":[9],"necessary.":[10],"However,":[11],"research":[12],"digital":[14],"memristive":[15],"systems":[16,106],"so":[17],"far":[18],"lacks":[19],"an":[20,92],"adequate":[21],"testing":[22,59,113],"platform":[23,103,127],"for":[24,72,118,132],"real":[25],"world":[26],"devices.":[27],"To":[28],"achieve":[29],"better":[30],"handson":[31],"experience,":[32],"we":[33],"developed":[34],"a":[35,67,78,107,134],"FPGA-based":[37],"solution":[38],"which":[39],"allows":[40],"to":[41,99],"link":[42],"with":[44,87],"arbitrary":[45],"compute":[46],"units":[47],"such":[48],"as":[49,81,142],"MIPS,":[50],"ARM":[51],"processor":[52,136],"cores":[53],"or":[54],"own":[55],"custom":[56],"designs.":[57],"The":[58,126],"environment":[60,114],"is":[61,110,128],"comprised":[62],"of":[63],"two":[64],"main":[65],"components:":[66],"dedicated":[68],"hardware":[69,89,139],"interface":[70,90],"circuit":[71],"steering":[73],"discrete":[74],"memristor":[75],"devices":[76],"and":[77],"memory":[79],"controller":[80],"IP":[82],"core":[83],"establishing":[84],"the":[85,88,101,116],"communication":[86],"utilizing":[91],"easy-to-use":[93],"AXI":[94],"interface.":[95],"Furthermore,":[96],"order":[98],"integrate":[100],"processing":[105],"C":[108],"API":[109],"supplied.":[111],"This":[112],"lays":[115],"foundation":[117],"future":[122],"hybrid":[123],"SoCs.":[125],"put":[129],"into":[130],"practice":[131],"evaluating":[133],"ternary":[135],"on":[137],"physical":[138],"using":[140],"multi-level":[143],"storage":[144],"cells.":[145]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2768520177","counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2024-12-13T06:05:59.393982","created_date":"2017-12-04"}
