{"id":"https://openalex.org/W3000038915","doi":"https://doi.org/10.1109/ipdrm49579.2019.00010","title":"Design and Evaluation of Shared Memory CommunicationBenchmarks on Emerging Architectures using MVAPICH2","display_name":"Design and Evaluation of Shared Memory CommunicationBenchmarks on Emerging Architectures using MVAPICH2","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W3000038915","doi":"https://doi.org/10.1109/ipdrm49579.2019.00010","mag":"3000038915"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdrm49579.2019.00010","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090838961","display_name":"Shulei Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shulei Xu","raw_affiliation_strings":["Dept. of Computer Science and Engineering, The Ohio State University"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, The Ohio State University","institution_ids":["https://openalex.org/I52357470"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008298485","display_name":"Jahanzeb Maqbool Hashmi","orcid":null},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jahanzeb Maqbool Hashmi","raw_affiliation_strings":["Dept. of Computer Science and Engineering, The Ohio State University"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, The Ohio State University","institution_ids":["https://openalex.org/I52357470"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101626747","display_name":"Sourav Chakraborty","orcid":"https://orcid.org/0000-0001-9518-6204"},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sourav Chakraborty","raw_affiliation_strings":["Dept. of Computer Science and Engineering, The Ohio State University"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, The Ohio State University","institution_ids":["https://openalex.org/I52357470"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034293705","display_name":"Hari Subramoni","orcid":"https://orcid.org/0000-0002-1200-2754"},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hari Subramoni","raw_affiliation_strings":["Dept. of Computer Science and Engineering, The Ohio State University"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, The Ohio State University","institution_ids":["https://openalex.org/I52357470"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024879682","display_name":"Dhabaleswar K. Panda","orcid":"https://orcid.org/0000-0002-0356-1781"},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dhabaleswar Panda","raw_affiliation_strings":["Ohio State University, USA"],"affiliations":[{"raw_affiliation_string":"Ohio State University, USA","institution_ids":["https://openalex.org/I52357470"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":0,"max":62},"biblio":{"volume":"73","issue":null,"first_page":"42","last_page":"49"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Performance Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Performance Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed Fault Tolerance and Consistency in Systems","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Distributed Storage Systems and Network Coding","score":0.9995,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multicore-architectures","display_name":"Multicore Architectures","score":0.593582},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.53778726},{"id":"https://openalex.org/keywords/xeon-phi","display_name":"Xeon Phi","score":0.5370694},{"id":"https://openalex.org/keywords/high-performance-computing","display_name":"High-Performance Computing","score":0.534737},{"id":"https://openalex.org/keywords/multiprocessor-soc","display_name":"Multiprocessor SoC","score":0.529663},{"id":"https://openalex.org/keywords/performance-optimization","display_name":"Performance Optimization","score":0.526828},{"id":"https://openalex.org/keywords/memory-systems","display_name":"Memory Systems","score":0.520176},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.48126715},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.47495484},{"id":"https://openalex.org/keywords/benchmarking","display_name":"Benchmarking","score":0.44988564},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.41039142}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8701229},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.58536804},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.53778726},{"id":"https://openalex.org/C96972482","wikidata":"https://www.wikidata.org/wiki/Q1049168","display_name":"Xeon Phi","level":2,"score":0.5370694},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.5203678},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.51426834},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5065986},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48704794},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.48126715},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.47495484},{"id":"https://openalex.org/C86251818","wikidata":"https://www.wikidata.org/wiki/Q816754","display_name":"Benchmarking","level":2,"score":0.44988564},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4369479},{"id":"https://openalex.org/C854659","wikidata":"https://www.wikidata.org/wiki/Q1859284","display_name":"Message passing","level":2,"score":0.43593436},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.41039142},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdrm49579.2019.00010","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":18,"referenced_works":["https://openalex.org/W1500216316","https://openalex.org/W1585237817","https://openalex.org/W1966054908","https://openalex.org/W1984788566","https://openalex.org/W2017915001","https://openalex.org/W2024336888","https://openalex.org/W2086070079","https://openalex.org/W2109349370","https://openalex.org/W2128294826","https://openalex.org/W2139783166","https://openalex.org/W2215735188","https://openalex.org/W2286475227","https://openalex.org/W2728371987","https://openalex.org/W2758990545","https://openalex.org/W2886520239","https://openalex.org/W2955374581","https://openalex.org/W4245217724","https://openalex.org/W4394518782"],"related_works":["https://openalex.org/W98999783","https://openalex.org/W2498758832","https://openalex.org/W2314805133","https://openalex.org/W2154020360","https://openalex.org/W2133825528","https://openalex.org/W1998761481","https://openalex.org/W184749201","https://openalex.org/W1586882033","https://openalex.org/W1544002944","https://openalex.org/W1483073283"],"abstract_inverted_index":{"Recent":[0],"advances":[1],"in":[2,26,49,91,101],"processor":[3],"technologies":[4],"have":[5,79],"led":[6],"to":[7,38,73,98,110,132],"highly":[8],"multi-threaded":[9],"and":[10,13,83,142,159,189],"dense":[11,21],"multi-":[12],"many-core":[14],"HPC":[15],"systems.":[16,29],"The":[17,43,58,175],"adoption":[18],"of":[19,61,67,104,129,172],"such":[20,136],"multi-core":[22],"processors":[23,63],"is":[24,95],"widespread":[25],"the":[27,65,87,92,102,112,155,164],"Top500":[28],"Message":[30],"Passing":[31],"Interface":[32],"(MPI)":[33],"has":[34],"been":[35,80],"widely":[36],"used":[37],"scale":[39],"out":[40,180],"scientific":[41],"applications.":[42],"communication":[44,48,71,106,167,173],"designs":[45,72,153],"for":[46,86,118,145,168],"intra-node":[47,166],"MPI":[50,105,157,165],"are":[51,178],"mainly":[52],"based":[53],"on":[54,107,163,181],"shared":[55,69,146],"memory":[56,70,147],"communication.":[57,148],"increased":[59],"core-density":[60],"modern":[62,108,119,182],"warrants":[64],"use":[66],"efficient":[68],"achieve":[74],"optimal":[75,113],"performance.":[76],"While":[77],"there":[78,94],"various":[81,134],"algorithms":[82],"data-structures":[84,135],"proposed":[85],"producer-consumer":[88],"like":[89],"scenarios":[90],"literature,":[93],"a":[96,127,169],"need":[97],"revisit":[99],"them":[100],"context":[103],"architectures":[109,184],"find":[111],"solutions":[114],"that":[115],"work":[116],"best":[117],"architectures.":[120],"In":[121],"this":[122],"paper,":[123],"we":[124,150],"first":[125],"propose":[126],"set":[128],"low-level":[130],"benchmarks":[131],"evaluate":[133],"as":[137],"Lamport":[138],"queues,":[139,141],"Fast-Forward":[140],"Fastboxes":[143],"(FB)":[144],"Then,":[149],"bring":[151],"these":[152],"into":[154],"MVAPICH2":[156],"library":[158],"measure":[160],"their":[161],"impact":[162],"wide":[170],"variety":[171],"patterns.":[174],"benchmarking":[176],"results":[177],"carried":[179],"multi-/many-core":[183],"including":[185],"Intel":[186,190],"Xeon":[187],"CascadeLake":[188],"Knights":[191],"Landing.":[192]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W3000038915","counts_by_year":[],"updated_date":"2024-10-08T14:22:59.992268","created_date":"2020-01-23"}