{"id":"https://openalex.org/W3195784889","doi":"https://doi.org/10.1109/access.2021.3107370","title":"Low Error Efficient Approximate Adders for FPGAs","display_name":"Low Error Efficient Approximate Adders for FPGAs","publication_year":2021,"publication_date":"2021-01-01","ids":{"openalex":"https://openalex.org/W3195784889","doi":"https://doi.org/10.1109/access.2021.3107370","mag":"3195784889"},"language":"en","primary_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3107370","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09521486.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},"type":"article","type_crossref":"journal-article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09521486.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090288162","display_name":"Waqar Ahmad","orcid":"https://orcid.org/0000-0001-9850-9339"},"institutions":[{"id":"https://openalex.org/I4210142152","display_name":"ORCID","ror":"https://ror.org/04fa4r544","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I4210142152"]},{"id":"https://openalex.org/I134235054","display_name":"Sabanc\u0131 \u00dcniversitesi","ror":"https://ror.org/049asqa32","country_code":"TR","type":"education","lineage":["https://openalex.org/I134235054"]}],"countries":["TR","US"],"is_corresponding":false,"raw_author_name":"Waqar Ahmad","raw_affiliation_strings":["Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, Istanbul, Turkey","ORCiD"],"affiliations":[{"raw_affiliation_string":"ORCiD","institution_ids":["https://openalex.org/I4210142152"]},{"raw_affiliation_string":"Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, Istanbul, Turkey","institution_ids":["https://openalex.org/I134235054"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006964338","display_name":"Berke Ayrancioglu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210142152","display_name":"ORCID","ror":"https://ror.org/04fa4r544","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I4210142152"]},{"id":"https://openalex.org/I134235054","display_name":"Sabanc\u0131 \u00dcniversitesi","ror":"https://ror.org/049asqa32","country_code":"TR","type":"education","lineage":["https://openalex.org/I134235054"]}],"countries":["TR","US"],"is_corresponding":false,"raw_author_name":"Berke Ayrancioglu","raw_affiliation_strings":["Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, Istanbul, Turkey","ORCiD"],"affiliations":[{"raw_affiliation_string":"ORCiD","institution_ids":["https://openalex.org/I4210142152"]},{"raw_affiliation_string":"Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, Istanbul, Turkey","institution_ids":["https://openalex.org/I134235054"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018819924","display_name":"\u0130lker Hamzao\u011flu","orcid":"https://orcid.org/0000-0002-6491-689X"},"institutions":[{"id":"https://openalex.org/I4210142152","display_name":"ORCID","ror":"https://ror.org/04fa4r544","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I4210142152"]},{"id":"https://openalex.org/I134235054","display_name":"Sabanc\u0131 \u00dcniversitesi","ror":"https://ror.org/049asqa32","country_code":"TR","type":"education","lineage":["https://openalex.org/I134235054"]}],"countries":["TR","US"],"is_corresponding":false,"raw_author_name":"Ilker Hamzaoglu","raw_affiliation_strings":["Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, Istanbul, Turkey","ORCiD"],"affiliations":[{"raw_affiliation_string":"ORCiD","institution_ids":["https://openalex.org/I4210142152"]},{"raw_affiliation_string":"Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, Istanbul, Turkey","institution_ids":["https://openalex.org/I134235054"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1850,"currency":"USD","value_usd":1850,"provenance":"doaj"},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850,"provenance":"doaj"},"fwci":2.054,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.672342,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":"9","issue":null,"first_page":"117232","last_page":"117243"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9992,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.80559874},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.72334456},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6689723},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5171544},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32347822},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2619096},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12305856},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.08312398}],"mesh":[],"locations_count":2,"locations":[{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3107370","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09521486.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},{"is_oa":false,"landing_page_url":"https://doaj.org/article/ff610303a3634af080ec204788426b9f","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3107370","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09521486.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},"sustainable_development_goals":[],"grants":[{"funder":"https://openalex.org/F4320322626","funder_display_name":"T\u00fcrkiye Bilimsel ve Teknolojik Ara\u015ft\u0131rma Kurumu","award_id":"118E134"}],"datasets":[],"versions":[],"referenced_works_count":34,"referenced_works":["https://openalex.org/W1509562192","https://openalex.org/W1528653255","https://openalex.org/W2005865544","https://openalex.org/W2026005150","https://openalex.org/W2045294186","https://openalex.org/W2111741784","https://openalex.org/W2129394555","https://openalex.org/W2135089667","https://openalex.org/W2155458498","https://openalex.org/W2161395307","https://openalex.org/W2510992755","https://openalex.org/W2588565458","https://openalex.org/W2742536119","https://openalex.org/W2773871951","https://openalex.org/W2789518040","https://openalex.org/W2798328726","https://openalex.org/W2799036754","https://openalex.org/W2799132243","https://openalex.org/W2801205959","https://openalex.org/W2811507150","https://openalex.org/W2906592685","https://openalex.org/W2916566087","https://openalex.org/W2947721658","https://openalex.org/W2981998581","https://openalex.org/W2998218845","https://openalex.org/W3004524066","https://openalex.org/W3033828253","https://openalex.org/W3089391587","https://openalex.org/W3092134818","https://openalex.org/W3116186505","https://openalex.org/W3147234326","https://openalex.org/W3161081559","https://openalex.org/W3161296546","https://openalex.org/W4299551239"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2899084033","https://openalex.org/W2790557758","https://openalex.org/W2748952813","https://openalex.org/W2516396101","https://openalex.org/W2386041993","https://openalex.org/W1967938402","https://openalex.org/W1608572506"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"propose":[4,31],"a":[5,77,171],"methodology":[6,18],"for":[7,14,35,192,204],"designing":[8],"low":[9,40],"error":[10,26,41,85,209],"efficient":[11,44,52,205],"approximate":[12,28,33,45,53,57,66,69,93,110,149,165,175,190,199],"adders":[13,34,58,73,94,166,176,191,200],"FPGAs.":[15],"The":[16,68,98,119],"proposed":[17,198],"utilizes":[19],"FPGA":[20,141,206],"resources":[21],"efficiently":[22],"to":[23,80],"reduce":[24],"the":[25,82,92,96,109,113,117,126,143,152,163,168,174,188],"of":[27,61,71,208],"adders.":[29],"We":[30],"two":[32],"FPGAs":[36],"using":[37],"our":[38,197],"methodology:":[39],"and":[42,48,50,64,132,145,158],"area":[43,49,157],"adder":[46,54,111,150],"(LEADx),":[47],"power":[51,135,147,160],"(APEx).":[55],"Both":[56],"are":[59,74,177],"composed":[60],"an":[62,65],"accurate":[63],"part.":[67],"parts":[70],"these":[72],"designed":[75],"in":[76,95,116,137,151,167,179],"systematic":[78],"way":[79],"minimize":[81],"mean":[83],"square":[84],"(MSE).":[86],"LEADx":[87,100,183],"has":[88,104,125,155],"lower":[89,106,130,159],"MSE":[90,107,115],"than":[91,108,142,162,187],"literature.":[97,118,153,169],"32-bit":[99],"with":[101,112,122],"16-bit":[102,120],"approximation":[103,124],"20%":[105],"lowest":[114,146],"APEx":[121,154],"8-bit":[123],"same":[127],"area,":[128],"60%":[129],"MSE,":[131],"4.5%":[133],"less":[134],"consumption":[136,161],"Xilinx":[138],"Virtex":[139],"7":[140],"smallest":[144],"consuming":[148],"smaller":[156],"other":[164,189],"As":[170],"case":[172],"study,":[173],"used":[178,203],"video":[180,193],"encoding":[181,194],"application.":[182,195],"provided":[184],"better":[185],"quality":[186],"Therefore,":[196],"can":[201],"be":[202],"implementations":[207],"tolerant":[210],"applications.":[211]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W3195784889","counts_by_year":[{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":14},{"year":2022,"cited_by_count":6}],"updated_date":"2024-12-12T06:03:10.025888","created_date":"2021-08-30"}