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We present an open source digital camera implemented on a field programmable gate array (FPGA). The camera functionality is completely described in VHDL and tested on the DE2-115 educational FPGA board. Some of the current features of the camera include video mode at 30 fps, storage of taken snapshots into SDRAM memories, and grayscale and edge detection filters. The main contributions of this project include 1) the actual system level design of the camera, tested and verified on an actual FPGA chip, and 2) the public release of the entire implementation including source code and documentation. While the proposed camera is far from being able to compete with commercial offerings, it can serve as a framework to test new research ideas related to digital camera systems, image processing, computer vision, etc., as well as an educational platform for advanced digital design with VHDL and FPGAs. As examples of that, we report two spin-off projects developed on top of or starting from the presented digital camera system.<\/p>","DOI":"10.4018\/ijhcr.2016100103","type":"journal-article","created":{"date-parts":[[2017,1,25]],"date-time":"2017-01-25T16:09:17Z","timestamp":1485360557000},"page":"30-40","source":"Crossref","is-referenced-by-count":3,"title":["Open Source Digital Camera on Field Programmable Gate Arrays"],"prefix":"10.4018","volume":"7","author":[{"given":"Cristinel","family":"Ababei","sequence":"first","affiliation":[{"name":"Marquette University, Department of Electrical and Computer Engineering, WI, USA"}]},{"given":"Shaun","family":"Duerr","sequence":"additional","affiliation":[{"name":"Marquette University, Department of Electrical and Computer Engineering, WI, USA"}]},{"given":"William Joseph","family":"Ebel Jr.","sequence":"additional","affiliation":[{"name":"Marquette University, Department of Electrical and Computer Engineering, WI, USA"}]},{"given":"Russell","family":"Marineau","sequence":"additional","affiliation":[{"name":"Marquette University, Department of Electrical and Computer Engineering, WI, USA"}]},{"given":"Milad Ghorbani","family":"Moghaddam","sequence":"additional","affiliation":[{"name":"Marquette University, Department of Electrical and Computer Engineering, WI, USA"}]},{"given":"Tanzania","family":"Sewell","sequence":"additional","affiliation":[{"name":"Marquette University, Department of Electrical and Computer Engineering, WI, USA"}]}],"member":"2432","reference":[{"key":"IJHCR.2016100103-0","doi-asserted-by":"publisher","DOI":"10.1109\/EIT.2016.7535230"},{"key":"IJHCR.2016100103-1","unstructured":"Cyclone IV FPGA Family: Lowest Cost, Lowest Power, Integrated Transceivers, (2015). Retrieved September 13, 2016, from http:\/\/www.altera.com\/devices\/fpga\/cyclone-iv\/cyiv-index.jsp"},{"key":"IJHCR.2016100103-2","unstructured":"DE2-115 Development and Education Board, (2015). Retrieved September 13, 2016, from http:\/\/www.altera.com\/education\/univ\/materials\/boards\/de2-115\/unv-de2-115-board.html"},{"key":"IJHCR.2016100103-3","doi-asserted-by":"crossref","unstructured":"Irgens, P., Bader, C., Le, T., Saxena, D., & Ababei, C. (2016, under review). An efficient and cost effective FPGA based implementation of the Viola-Jones face detection algorithm. Submitted for consideration of publication.","DOI":"10.1016\/j.ohx.2017.03.002"},{"key":"IJHCR.2016100103-4","unstructured":"Lab, M. E. S. S. Open Source HW Projects, Marquette University, (2016). Retrieved September 13, 2016, from http:\/\/dejazzer.com\/hardware.html"},{"key":"IJHCR.2016100103-5","unstructured":"Moore, C., Devos, D., & Stroobandt, D. (2009). Optimizing the FPGA memory design for a Sobel edge detector. Paper presented at Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)."},{"key":"IJHCR.2016100103-6","unstructured":"OV7670 Camera Module with OmniVision CMOS Sensor. Datasheet, (2015). Retrieved September 13, 2016, from http:\/\/www.cutedigi.com\/pub\/sensor\/Imaging\/OV7670-Datasheet.pdf"},{"key":"IJHCR.2016100103-7","unstructured":"Opencores - community for development of hardware IP cores as open source, (2016). Retrieved September 13, 2016, from http:\/\/opencores.org"},{"key":"IJHCR.2016100103-8","unstructured":"Quartus II Web Edition Software 14.1, (2015). Retrieved September 13, 2016, from http:\/\/www.altera.com\/products\/software\/quartus-ii\/web-edition\/qts-we-index.html"},{"key":"IJHCR.2016100103-9","author":"S.Singh","year":"2013","journal-title":"Area optimized FPGA-based implementation of the Sobel compass edge detector"},{"key":"IJHCR.2016100103-10","unstructured":"Sobel, I. (2014), History and Definition of the Sobel Operator. Retrieved September 13, 2016, https:\/\/www.researchgate.net\/publication\/239398674_An_Isotropic_3_3_Image_Gradient_Operator"},{"key":"IJHCR.2016100103-11","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2001.990517"}],"container-title":["International Journal of Handheld Computing Research"],"original-title":[],"language":"ng","link":[{"URL":"https:\/\/www.igi-global.com\/viewtitle.aspx?TitleId=176417","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T16:22:22Z","timestamp":1654100542000},"score":1,"resource":{"primary":{"URL":"https:\/\/services.igi-global.com\/resolvedoi\/resolve.aspx?doi=10.4018\/IJHCR.2016100103"}},"subtitle":[""],"short-title":[],"issued":{"date-parts":[[2016,10,1]]},"references-count":12,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2016,10]]}},"URL":"https:\/\/doi.org\/10.4018\/ijhcr.2016100103","relation":{},"ISSN":["1947-9158","1947-9166"],"issn-type":[{"value":"1947-9158","type":"print"},{"value":"1947-9166","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,10,1]]}}}