{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T08:01:50Z","timestamp":1649059310615},"reference-count":5,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"23","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2007]]},"DOI":"10.1587\/elex.4.731","type":"journal-article","created":{"date-parts":[[2007,12,10]],"date-time":"2007-12-10T05:50:28Z","timestamp":1197265828000},"page":"731-737","source":"Crossref","is-referenced-by-count":1,"title":["Novel explicit pulse-based flip-flop for high speed and low power SoCs"],"prefix":"10.1587","volume":"4","author":[{"given":"Sung-Chan","family":"Kang","sequence":"first","affiliation":[{"name":"School of Information and Communication Engineering, Sungkyunkwan University"}]},{"given":"Byung-Hwa","family":"Jung","sequence":"additional","affiliation":[{"name":"School of Information and Communication Engineering, Sungkyunkwan University"}]},{"given":"Bai-Sun","family":"Kong","sequence":"additional","affiliation":[{"name":"School of Information and Communication Engineering, Sungkyunkwan University"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/4.753687"},{"key":"2","unstructured":"[2] H. Partovi, R. Burd, U. Salim, F. Weber, L. DiGregorio, and D. Draper, “Flow-through latch and edge-triggered flip-flop hybrid elements, ”