{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,12,30]],"date-time":"2022-12-30T05:25:02Z","timestamp":1672377902754},"reference-count":29,"publisher":"Association for Computing Machinery (ACM)","issue":"4","funder":[{"DOI":"10.13039\/501100002809","name":"Generalitat de Catalunya","doi-asserted-by":"publisher","award":["2009SGR1250"],"id":[{"id":"10.13039\/501100002809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003329","name":"Ministerio de Econom\u00eda y Competitividad","doi-asserted-by":"publisher","award":["TIN 2010-18368TIN 2007-68050-C03-03"],"id":[{"id":"10.13039\/501100003329","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2012,1]]},"abstract":"The exponential increase in multicore processor (CMP) cache sizes accompanied by growing on-chip wire delays make it difficult to implement traditional caches with a single, uniform access latency. Non-Uniform Cache Architecture (NUCA) designs have been proposed to address this problem. A NUCA divides the whole cache memory into smaller banks and allows banks nearer a processor core to have lower access latencies than those further away, thus mitigating the effects of the cache's internal wires. Determining the best placement for data in the NUCA cache at any particular moment during program execution is crucial for exploiting the benefits that this architecture provides. Dynamic NUCA (D-NUCA) allows data to be mapped to multiple banks within the NUCA cache, and then uses data migration to adapt data placement to the program's behavior. Although the standard migration scheme is effective in moving data to its optimal position within the cache, half the hits still occur within non-optimal banks. This paper reduces this number by anticipating data migrations and moving data to the optimal banks in advance of being required. We introduce a prefetcher component to the NUCA cache that predicts the next memory request based on the past. We develop a realistic implementation of this prefetcher and, furthermore, experiment with a perfect prefetcher that always knows where the data resides, in order to evaluate the limits of this approach. We show that using our realistic data prefetching to anticipate data migrations in the NUCA cache can reduce the access latency by 15% on average and achieve performance improvements of up to 17%.<\/jats:p>","DOI":"10.1145\/2086696.2086724","type":"journal-article","created":{"date-parts":[[2012,1,24]],"date-time":"2012-01-24T16:47:14Z","timestamp":1327423634000},"page":"1-20","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["The migration prefetcher"],"prefix":"10.1145","volume":"8","author":[{"given":"Javier","family":"Lira","sequence":"first","affiliation":[{"name":"Universitat Polit\u00e8cnica de Catalunya, Spain"}]},{"given":"Timothy M.","family":"Jones","sequence":"additional","affiliation":[{"name":"University of Cambridge, UK"}]},{"given":"Carlos","family":"Molina","sequence":"additional","affiliation":[{"name":"Universitat Rovira i Virgili, Spain"}]},{"given":"Antonio","family":"Gonz\u00e1lez","sequence":"additional","affiliation":[{"name":"Intel Barcelona Research Center, Intel Labs - UPC, Spain"}]}],"member":"320","published-online":{"date-parts":[[2012,1,26]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339691"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1327171.1327184"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.10"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.21"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_2_1_6_1","unstructured":"Borkar S. Y. Dubey P. Kahn K. C. Kuck D. J. Mulder H. Pawlowski S. S. and Rattner J. R. 2005. Platform 2015: Intel processor and platform evolution for the next decade. Technol.@Intel Mag. Borkar S. Y. Dubey P. Kahn K. C. Kuck D. J. Mulder H. Pawlowski S. S. and Rattner J. R. 2005. Platform 2015: Intel processor and platform evolution for the next decade. Technol.@Intel Mag."},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11390-009-9233-4"},{"key":"e_1_2_1_8_1","unstructured":"Charney M. J. and Reeves A. P. Feb 1995. Generalized correlation based hardware prefetching. Tech. rep. EE-CEG-95-1 Cornell University. Charney M. J. and Reeves A. P. Feb 1995. Generalized correlation based hardware prefetching. Tech. rep. EE-CEG-95-1 Cornell University."},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798258"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.381947"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454144"},{"key":"e_1_2_1_12_1","volume-title":"Proceedings of the 22nd International Conference on Computer Design.","author":"Grochowski E."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-92990-1_26"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555779"},{"key":"e_1_2_1_15_1","volume-title":"Proceedings of the 9th International Symposium on High-Performance Computer Architecture.","author":"Hu Z."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/264107.264207"},{"key":"e_1_2_1_17_1","volume-title":"Proceedings of the International Conference on Supercomputing.","author":"Kandemir M."},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605420"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1105734.1105747"},{"key":"e_1_2_1_21_1","unstructured":"Micron. 2009. System power calculator. http:\/\/www.micron.com\/. Micron. 2009. System power calculator. http:\/\/www.micron.com\/."},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2009.22"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.30"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2004.10030"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/356887.356892"},{"key":"e_1_2_1_26_1","unstructured":"SPEC. 2006. Spec cpu2006. http:\/\/www.spec.org\/cpu2006. SPEC. 2006. Spec cpu2006. http:\/\/www.spec.org\/cpu2006."},{"key":"e_1_2_1_27_1","volume-title":"Proceedings of the 23rd International Symposium on Computer Architecture.","author":"VanderWiel S."},{"key":"e_1_2_1_28_1","volume-title":"Proceedings of the 35th International Symposium on Microarchitecture.","author":"Wang H. S."},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.79"}],"container-title":["ACM Transactions on Architecture and Code Optimization"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2086696.2086724","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,29]],"date-time":"2022-12-29T18:14:57Z","timestamp":1672337697000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2086696.2086724"}},"subtitle":["Anticipating data promotion in dynamic NUCA caches"],"short-title":[],"issued":{"date-parts":[[2012,1]]},"references-count":29,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2012,1]]}},"alternative-id":["10.1145\/2086696.2086724"],"URL":"http:\/\/dx.doi.org\/10.1145\/2086696.2086724","relation":{},"ISSN":["1544-3566","1544-3973"],"issn-type":[{"value":"1544-3566","type":"print"},{"value":"1544-3973","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,1]]},"assertion":[{"value":"2011-07-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2011-11-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2012-01-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}
