{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,17]],"date-time":"2024-06-17T01:28:28Z","timestamp":1718587708251},"reference-count":65,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2008,7,1]],"date-time":"2008-07-01T00:00:00Z","timestamp":1214870400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Neural Netw."],"published-print":{"date-parts":[[2008,7]]},"DOI":"10.1109\/tnn.2008.2000163","type":"journal-article","created":{"date-parts":[[2008,7,8]],"date-time":"2008-07-08T19:19:02Z","timestamp":1215544742000},"page":"1196-1219","source":"Crossref","is-referenced-by-count":55,"title":["On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing"],"prefix":"10.1109","volume":"19","author":[{"given":"R.","family":"Serrano-Gotarredona","sequence":"first","affiliation":[]},{"given":"T.","family":"Serrano-Gotarredona","sequence":"additional","affiliation":[]},{"given":"A.","family":"Acosta-Jimenez","sequence":"additional","affiliation":[]},{"given":"C.","family":"Serrano-Gotarredona","sequence":"additional","affiliation":[]},{"given":"J.A.","family":"Perez-Carrasco","sequence":"additional","affiliation":[]},{"given":"B.","family":"Linares-Barranco","sequence":"additional","affiliation":[]},{"given":"A.","family":"Linares-Barranco","sequence":"additional","affiliation":[]},{"given":"G.","family":"Jimenez-Moreno","sequence":"additional","affiliation":[]},{"given":"A.","family":"Civit-Ballcels","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","volume":"17","author":"vogelstein","year":"2005","journal-title":"Advances in Neural Information Processing Systems (NIPS'2004)"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1016\/S0893-6080(01)00057-0"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/MNNFS.1996.493766"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-4831-7_19"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/72.217193"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1016\/S0129-0657(00)00016-8"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2005.849845"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ARVLSI.1999.756038"},{"key":"ref35","doi-asserted-by":"crossref","first-page":"416","DOI":"10.1109\/82.842110","article-title":"Point-to-point connectivity between neuromorphic chips using address events","volume":"47","author":"boahen","year":"2000","journal-title":"IEEE Trans Circuits Syst II Analog Digit Signal Process"},{"key":"ref34","author":"maass","year":"1999","journal-title":"Pulsed Neural Networks"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/TBME.2003.821039"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2007.900179"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/TBME.2003.821040"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2006.1693319"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807412"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1016\/S0893-6080(01)00083-1"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/82.554431"},{"key":"ref65","article-title":"A calibration technique for very low current and compact tunable neuromorphic cells. Application to 5?bit 20 nA DACs","author":"le\ufffdero-bardallo","year":"2008","journal-title":"IEEE Trans Circuits Syst II Exp Briefs"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/81.788808"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1038\/381520a0"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/0893-6080(95)00079-8"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2724-4"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/4.387069"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/72.286916"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.816385"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/4.551909"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.849136"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2003.822551"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.900881"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/ETLPDS.1996.508872"},{"key":"ref59","first-page":"508","article-title":"A 128$\\,\\times\\,$<\/tex><\/formula>128 120 dB 30 mW asynchronous vision sensor that responds to relative intensity change","author":"lichtsteiner","year":"2006","journal-title":"IEEE Int Solid-State Circuit Conf Dig Tech Papers"},{"key":"ref58","article-title":"High-speed character recognition system based on a complex hierarchical AER architecture","author":"p\ufffdrez-carrasco","year":"2008","journal-title":"IEEE Int Conf Circuits Syst"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2006.07.020"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2006.872253"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/92.502192"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.883843"},{"key":"ref53","first-page":"1","article-title":"programming in vlsi: from communicating processes to delay-insensitive circuits","author":"martin","year":"1990","journal-title":"Proc UT Year Program Inst Concurrent Program"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1117\/12.607707"},{"key":"ref10","first-page":"40","article-title":"Robust face analysis using convolution neural networks","volume":"2","author":"fasel","year":"2002","journal-title":"Proc Int Conf Pattern Recognit"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.48"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ARVLSI.1995.515618"},{"key":"ref12","first-page":"355","article-title":"A custom image convolution DSP with a sustained calculation capacity of $>$<\/tex><\/formula>1 GMAC\/s and low I\/O bandwidth","volume":"23","author":"v wall","year":"1999","journal-title":"J VLSI Signal Process"},{"key":"ref13","first-page":"677","article-title":"a low-power image convolution algorithm for variable voltage processors","volume":"2","author":"kwon","year":"2003","journal-title":"Proc IEEE Int Conf Acoust Speech Signal Process"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MPPOI.1996.559035"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1117\/12.324004"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/4.896230"},{"key":"ref17","author":"shepherd","year":"1990","journal-title":"The Synaptic Organization of the Brain"},{"key":"ref18","author":"sivilotti","year":"1991","journal-title":"Wiring considerations in analog VLSI systems with application to field-programmable networks"},{"key":"ref19","author":"mahowald","year":"1992","journal-title":"VLSI Analogs of neural visual processing A synthesis of form and function"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/BF00344251"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TSSC.1969.300225"},{"key":"ref6","first-page":"255","author":"lecun","year":"1995","journal-title":"The Handbook of Brain Science and Neural Networks"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/72.97912"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/72.701181"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2006.1693218"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/72.554195"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.816370"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2003.1257213"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/4.173099"},{"key":"ref47","author":"weste","year":"1993","journal-title":"A System Perspective"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cds:19941532"},{"key":"ref41","year":"2000","journal-title":"IEEE Standard VHDL Language Reference Manual"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.814415"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2004.1329915"}],"container-title":["IEEE Transactions on Neural Networks"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/72\/4558069\/04490276.pdf?arnumber=4490276","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,23]],"date-time":"2021-12-23T15:33:14Z","timestamp":1640273594000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4490276\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,7]]},"references-count":65,"journal-issue":{"issue":"7"},"URL":"http:\/\/dx.doi.org\/10.1109\/tnn.2008.2000163","relation":{},"ISSN":["1045-9227","1941-0093"],"issn-type":[{"value":"1045-9227","type":"print"},{"value":"1941-0093","type":"electronic"}],"subject":[],"published":{"date-parts":[[2008,7]]}}}
