{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,11]],"date-time":"2024-08-11T05:09:56Z","timestamp":1723352996322},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["U19B2019","U21B2031","61832007","62104128"],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100014121","name":"Tsinghua EE Xilinx AI Research Fund","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100014121","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100017582","name":"Beijing National Research Center for Information Science and Technology","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100017582","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,6]]},"DOI":"10.1109\/tcad.2022.3213617","type":"journal-article","created":{"date-parts":[[2022,10,11]],"date-time":"2022-10-11T19:31:32Z","timestamp":1665516692000},"page":"1951-1964","source":"Crossref","is-referenced-by-count":2,"title":["Adaptive Multidimensional Parallel Fault Simulation Framework on Heterogeneous System"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"http:\/\/orcid.org\/0000-0003-2720-5594","authenticated-orcid":false,"given":"Jingbo","family":"Hu","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, Tsinghua University, Beijing, China"}]},{"ORCID":"http:\/\/orcid.org\/0000-0002-8464-0130","authenticated-orcid":false,"given":"Guohao","family":"Dai","sequence":"additional","affiliation":[{"name":"Qing Yuan Research Institute, Shanghai Jiao Tong University, Shanghai, China"}]},{"given":"Liuzheng","family":"Wang","sequence":"additional","affiliation":[{"name":"Architecture and Design Department, HiSilicon Technologies Company Ltd., Shenzhen, China"}]},{"ORCID":"http:\/\/orcid.org\/0000-0003-1041-8980","authenticated-orcid":false,"given":"Liyang","family":"Lai","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering and Guangdong Provincial Key Laboratory of Digital Signal and Image Processing, Shantou University, Shantou, China"}]},{"given":"Yu","family":"Huang","sequence":"additional","affiliation":[{"name":"Architecture and Design Department, HiSilicon Technologies Company Ltd., Shenzhen, China"}]},{"given":"Huazhong","family":"Yang","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Tsinghua University, Beijing, China"}]},{"ORCID":"http:\/\/orcid.org\/0000-0001-6108-5157","authenticated-orcid":false,"given":"Yu","family":"Wang","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Tsinghua University, Beijing, China"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/63047.63064"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/43.57785"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2010.5699235"},{"key":"ref15","first-page":"18","article-title":"Machine Learning computation on multiple GPU’s using CUDA and message passing interface","author":"mittal","year":"2019","journal-title":"Proc IEEE 2nd Int Conf Power Energy Environ Intell Control (PEEIC)"},{"key":"ref14","first-page":"198","article-title":"Vectorized fault simulation on the Cray XMP supercomputer","author":"ozguner","year":"1988","journal-title":"Proc Int Conf Comput -Aided Des"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/RTEICT.2017.8256869"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2002.994869"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1995.528931"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISED.2013.34"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1993.393314"},{"key":"ref32","year":"2005","journal-title":"IWLS 2005 Benchmarks"},{"key":"ref2","author":"abramovici","year":"1990","journal-title":"Digital Systems Testing and Testable Design"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2013.6651916"},{"key":"ref17","first-page":"217","article-title":"Social network analysis algorithm on a many-core GPU","author":"seo","year":"2012","journal-title":"Proc 4th Int Conf Ubiquitous Future Netw (ICUFN)"},{"key":"ref16","first-page":"347","article-title":"HeteroSpark: A heterogeneous CPU\/GPU Spark platform for machine learning algorithms","author":"li","year":"2015","journal-title":"Proc IEEE Int Conf Netw Archit Storage (NAS)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391679"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2013.41"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2158432"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630056"},{"key":"ref26","year":"2021","journal-title":"Nvidia CUDA Homepage"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2884992"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837369"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090871"},{"key":"ref21","first-page":"946","article-title":"An efficient, forward fault simulation algorithm based on the parallel pattern single fault propagat","author":"lee","year":"1991","journal-title":"Proc IEEE Int Test Conf"},{"key":"ref28","year":"2021","journal-title":"Virginia tech VLSI for telecommunications"},{"key":"ref27","year":"2021","journal-title":"ITC’99 Benchmarks"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT.2015.7114549"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1995.528932"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/BF00159833"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/43.103504"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1983.1270024"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008275810655"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/43.215006"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.1987.295211"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10129269\/09916052.pdf?arnumber=9916052","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,12]],"date-time":"2023-06-12T18:13:35Z","timestamp":1686593615000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9916052\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6]]},"references-count":34,"journal-issue":{"issue":"6"},"URL":"http:\/\/dx.doi.org\/10.1109\/tcad.2022.3213617","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,6]]}}}
