{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,2]],"date-time":"2024-09-02T05:11:26Z","timestamp":1725253886404},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2018,11,1]],"date-time":"2018-11-01T00:00:00Z","timestamp":1541030400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,11,1]],"date-time":"2018-11-01T00:00:00Z","timestamp":1541030400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,11,1]],"date-time":"2018-11-01T00:00:00Z","timestamp":1541030400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["U1709220","61472152","61572209"],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Wuhan Science and technology","award":["2017010201010108"]},{"DOI":"10.13039\/501100012226","name":"Fundamental Research Funds for the Central Universities","doi-asserted-by":"crossref","award":["2016YXMS019"],"id":[{"id":"10.13039\/501100012226","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100013314","name":"111 Project","doi-asserted-by":"crossref","award":["B07038"],"id":[{"id":"10.13039\/501100013314","id-type":"DOI","asserted-by":"crossref"}]},{"name":"Key Laboratory of Data Storage System, Ministry of Education"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/tcad.2018.2858339","type":"journal-article","created":{"date-parts":[[2018,10,16]],"date-time":"2018-10-16T18:46:00Z","timestamp":1539715560000},"page":"2918-2928","source":"Crossref","is-referenced-by-count":5,"title":["WARD: Wear Aware RAID Design Within SSDs"],"prefix":"10.1109","volume":"37","author":[{"ORCID":"http:\/\/orcid.org\/0000-0002-5346-5560","authenticated-orcid":false,"given":"Shunzhuo","family":"Wang","sequence":"first","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, China"}]},{"given":"Fei","family":"Wu","sequence":"additional","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, China"}]},{"given":"Zhonghai","family":"Lu","sequence":"additional","affiliation":[{"name":"School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden"}]},{"given":"Jiaona","family":"Zhou","sequence":"additional","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, China"}]},{"given":"Changsheng","family":"Xie","sequence":"additional","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, China"}]}],"member":"263","reference":[{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2015666"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2008.4558857"},{"key":"ref10","doi-asserted-by":"crossref","first-page":"264","DOI":"10.1109\/55.998871","article-title":"Effects of floating-gate interference on NAND flash memory cell operation","volume":"23","author":"lee","year":"2002","journal-title":"Electron Device Lett"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.60"},{"key":"ref12","first-page":"1","article-title":"High performance FTL for PCIe\/NVMe SSDs","author":"tai","year":"2016","journal-title":"Proc Flash Memory Summit"},{"key":"ref13","year":"2005","journal-title":"Memory management in NAND flash arrays overview"},{"key":"ref14","first-page":"1","article-title":"A new era in embedded flash memory","author":"maislos","year":"2011","journal-title":"Proc Flash Memory Summit"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.49"},{"key":"ref16","first-page":"123","article-title":"Program interference in MLC NAND flash memory: Characterization, mitigation, and recovery","author":"cai","year":"2013","journal-title":"Proc ICCD"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056062"},{"key":"ref18","first-page":"521","article-title":"Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis","author":"cai","year":"2012","journal-title":"Proc DATE"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2012.6232375"},{"key":"ref28","year":"2017","journal-title":"How Micron SSDs Handle Unexpected Power Loss"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6621-6"},{"key":"ref27","first-page":"1915","article-title":"Techniques for embracing intra-cell unbalanced bit error characteristics in MLC NAND flash memory","author":"dong","year":"2012","journal-title":"Proc GLOBECOM Workshops"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2003.813455"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2003.811709"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-017-7512-0_10"},{"key":"ref5","first-page":"2","article-title":"The bleak future of NAND flash memory","author":"grupp","year":"2012","journal-title":"Proc FAST"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1982185.1982266"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/971701.50214"},{"key":"ref2","first-page":"309","article-title":"I\/O stack optimization for smartphones","author":"jeong","year":"2013","journal-title":"Proc ATC"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2013.6575359"},{"key":"ref1","first-page":"57","article-title":"Design tradeoffs for SSD performance","author":"agrawal","year":"2008","journal-title":"Proc ATC"},{"key":"ref20","first-page":"1253","article-title":"Lifetime adaptive ECC in NAND flash page management","author":"wang","year":"2017","journal-title":"Proc DATE"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1629435.1629459"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.197"},{"key":"ref24","author":"hu","year":"2011","journal-title":"Ssdsim"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2604292"},{"key":"ref26","year":"2016","journal-title":"TOSHIBA 3D Flash Memory Toggle DDR2 0 Technical Data Sheet"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1416944.1416949"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8496924\/08493504.pdf?arnumber=8493504","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,16]],"date-time":"2023-08-16T17:29:48Z","timestamp":1692206988000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8493504\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":31,"journal-issue":{"issue":"11"},"URL":"http:\/\/dx.doi.org\/10.1109\/tcad.2018.2858339","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,11]]}}}
