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Link to original content: https://api.crossref.org/works/10.1109/ISQED.2010.5450538
{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:16:08Z","timestamp":1730276168160,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/isqed.2010.5450538","type":"proceedings-article","created":{"date-parts":[[2010,4,20]],"date-time":"2010-04-20T09:45:07Z","timestamp":1271756707000},"page":"443-446","source":"Crossref","is-referenced-by-count":2,"title":["Domino gate with modified voltage keeper"],"prefix":"10.1109","author":[{"family":"Jinhui Wang","sequence":"first","affiliation":[]},{"family":"Wuchen Wu","sequence":"additional","affiliation":[]},{"family":"Na Gong","sequence":"additional","affiliation":[]},{"family":"Ligang Hou","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.823665"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1057661.1057694"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2008.01.028"},{"journal-title":"International Technology Roadmap for Semiconductors","year":"2008","key":"ref6"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.876463"},{"journal-title":"Intel Technology Journal","article-title":"Interconnect and Noise Immunity Design for the Pentium 4 Processor","year":"2001","author":"kumar","key":"ref5"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2005.111"},{"journal-title":"Predictive Technology Model (PTM)","year":"0","key":"ref8"},{"key":"ref7","first-page":"2443","article-title":"PN Mixed Pull-down Network Domino XOR Gate Design in 45nm Technology","volume":"29","author":"wang","year":"2008","journal-title":"Chinese Journal of Semiconductors"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2004.1329422"},{"key":"ref9","first-page":"1412","article-title":"Charge Self-compensation Technology Research for Low power and high performance Domino circuits","volume":"29","author":"wang","year":"2008","journal-title":"Chinese Journal of Semiconductors"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.881197"}],"event":{"name":"2010 11th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2010,3,22]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2010,3,24]]}},"container-title":["2010 11th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5443864\/5450389\/05450538.pdf?arnumber=5450538","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T16:02:42Z","timestamp":1489852962000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5450538\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/isqed.2010.5450538","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}